Journal Papers

(2000 ~ )


[~1989]
  [1990]  [1991]  [1992]  [1993]  [1994]  [1995]  [1996] 
[1997]  [1998]  [1999]  [2000]  [2001]  [2002]  [2003]  [2004]  [2005] [2006] [2007] [2008] [2009]

[SCI] means that the jounal is listed on Science Citation Index

2 0 0 9

 

  1. Jhon Hee Sauk, Lee Jaehong, Jae Ho Lee, Byoungchan Oh, Song Ickhyun, Yoon Yeonam, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "fmax improvement by controlling extrinsic parasitics in circuit-level MOS transistor", IEEE Electron Device Letters, vol. 30 no. 12 pp.1323-1325, Dec. 2009 [SCI][DOWNLOAD]
  2. Yeonsung Kang, Heesang Kim, Jae Ho Lee, Younghwan Son, Byung-Gook Park, Jong Duk Lee,and Hyungcheol Shin, "Modeling of polysilicon depletion effect in recessed-channel MOSFETs", IEEE Electron Device Letters, vol. 30 no. 12 pp.1371-1373, Dec. 2009 [SCI][DOWNLOAD]
  3. Gil Sung Lee, Jung Hoon Lee, Il Han Park, Seongjae Cho, Jang-Gn Yun, Dong Hwa Li, Doo Hyun Kim, Yoon Kim, Se Hwan Park, Won Bo Shim, Wan Dong Kim, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Cone-Type SONOS Flash Memory", IEEE Electron Device Letters, Vol. 30, No. 12 pp.1332-1334, Dec. 2009 [SCI][DOWNLOAD]
  4. Jae Ho Lee, Jaehong Lee, Jongwook Jeon, Hee-Sauk Jhon, and Hyungcheol Shin, "Deembedding accuracy for device scale and interconnection line parasitics", IEEE Microwave and Wireless Components Letters, Vol. 19 No. 11 pp.713-715, Nov. 2009 [SCI][DOWNLOAD]
  5. Bong Chan Kim, Jongwook Jeon, and Hyungcheol Shin, "Temporal noise analysis and reduction method in CMOS image sensor readout circuit", IEEE Transactions on Electron Devices, Vol. 56 No. 11 pp.2489-2495, Nov. 2009 [SCI][DOWNLOAD]
  6. Jieun Lee, Changmin Choi, Sungwook Park, In-Young Chung, Chang-Joon Kim, Byung-Gook Park, Dong Myong Kim and Dae Hwan Kim,Ultra-energy-efficient analog-to-digital converters based on single-electron transistor/CMOS hybrid technology for biomedical applications, Semiconductor Science and Technology, vol. 24, iss. 10, p. 115007, Oct. 2009 [SCI][DOWNLOAD]
  7. Hee-Sauk Jhon, Hakchul Jung, Jongwook Jeon, Minsuk Koo, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, SIZE EFFICIENT LOW-NOISE AMPLIFIER FOR 2.4 GHz ISM-BAND TRANSCEIVER, Microwave and Optical Technology Letters, vol. 51, No. 10, pp. 2304 - 2308, Oct. 2009 [SCIE][DOWNLOAD]
  8. Jong Pil Kim, Jae Young Song, Sang Wan Kim, Jae Hyun Park, Woo Young Choi, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park,Self-Aligned Asymmetric MetalOxideSemiconductor Field Effect Transistors Fabricated on Silicon-on-Insulator,Japanese Journal of Applied Physics, Vol. 48, No. 9, pp. 091201, Sep. 24, 2009 [SCI][DOWNLOAD]
  9. Seongjae Cho, Il Han Park, Yoon Kim, Se Hwan Park, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park,A Gated Twin-Bit (GTB) Nonvolatile Memory Device and Its Fabrication Method, IEEE Trans. Nanotechnol., Vol. 8, No. 5, pp. 595-602, Sep. 2009 [SCI][DOWNLOAD]
  10. Jang-Gn Yun, Il Han Park, Wandong Kim, Jong Duk Lee, and Byung-Gook Park,Extended Word-Line NAND Flash Memory, Jpn. J. Appl. Phys., vol. 48, p. 081203, 2009 [SCI][DOWNLOAD]
  11. Jang-Gn Yun, Yoon Kim, Il Han Park, Jung Hoon Lee, Daewoong Kang, Myoungrack Lee, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park,Independent Double-Gate Fin SONOS Flash Memory Fabricated With Sidewall Spacer Patterning, IEEE Trans. Electron Dev., Vol.56, No. 8, pp. 1721-1728, Aug. 2009 [SCI][DOWNLOAD]
  12. Daewoong Kang, Seungwon Yang, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, Extraction of trap depth in flash cell having arch-active structure, Applied Physics Express, vol. 2, No. 7, pp. 71202, July. 2009 [SCI][DOWNLOAD]
  13. Dong Seup Lee, Hong-Seon Yang, Kwon-Chil Kang, Joung-Eob Lee, Jung Han Lee, Sang Hyuk Park, and Byung-Gook Park,Silicon-Based Dual-Gate Single-Electron Transistors for Logic Applications, Japanese Journal of Applied Physics, Volume 48, Issue 7, pp. 071203, July 21, 2009 [SCI][DOWNLOAD]
  14. Dong Seup Lee, Sangwoo Kang, Kwon-Chil Kang, Joung-Eob Lee, Jung Hoon Lee, Kwan-Jae Song, Dong Myong Kim, Jong Duk Lee, and Byung-Gook Park,Fabrication and Characteristics of Self-Aligned Dual-Gate Single-Electron Transistors, IEEE Trans. Nanotechology, Vol.8, No. 4, pp. 492-497, July 2009 [SCI][DOWNLOAD]
  15. Jang-Gn Yun, Jong Duk Lee and Byung-Gook Park, Various Flash Memory Devices of Novel Design, IETE Technical Review, Volume 26, Issue 4, pp. 247-257, JUL-AUG 2009 [SCIE][DOWNLOAD]
  16. Jaehong Lee, Junsoo Kim, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, Application of area-saving RF test structure on mobility extraction, Journal of Semiconductor Technology and Science, Vol.9, No.2, pp. 98-103, June 2009 [DOWNLOAD]
  17. Shen Yehao, Jaehong Lee, Hyungcheol Shin, 62nm CMOS 기술을 적용한 20 GHz 이하의 1단 저잡음 증폭기 설계”, 전자공학회논문지(SD), Vol.46, No.6, pp. 48-51, June 2009 [DOWNLOAD]
  18. Younghwan Son, Seungwon Yang, Bong Chan Kim, Jinho Kim, Chang-Rok Moon, Duckhyung Lee, Jong-Duk Lee, Byung-Gook Park, and Hyungcheol Shin, Extraction of Interface-States Energy Distribution in Nitrided and Pure Gate Dielectrics for Metal Oxide Semiconductor Field Effect Transistor Applications, Japanese Journal of Applied Physics, Volume 48, No. 5, pp. 054502, May 2009 [SCI][DOWNLOAD]
  19. Changmin Choi, Jieun Lee, Sungwook Park, In-Young Chung, Chang-Joon Kim, Byung-Gook Park, Dong Myong Kim and Dae Hwan Kim, Comparative study on the energy efficiency of logic gates based on single-electron transistor technology, 2009 Semicond. Sci. Technol., Volume 24, No. 6, pp. 065007, 5 May 2009 [SCI][DOWNLOAD]
  20. Byung-Gook Park, Jae Young Song, Jong Pil Kim, Hoon Jeong, Jung Hoon Lee, Seongjae Cho, Nanosculpture: Three-dimensional CMOS device structures for the ULSI era, Microelectronics Journal, Volume 40, Issues 4-5, pp. 769-772, April-May 2009 [SCIE][DOWNLOAD]
  21. Doo-Hyun Kim, Il Han Park, Seongjae Cho, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, Simulation of Retention Characteristics in Double-Gate Structure Multi-Bit SONOS Flash Memory, IEICE Transactions on Electronics, Vol. E92-C, No. 5, pp. 659-663, May 2009 [SCIE][DOWNLOAD]
  22. Yoon Kim, Seongjae Cho, Gil Sung Lee, Il Han Park, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, 3-Dimensional Terraced NAND (3D TNAND) Flash Memory-Stacked Version of Folded NAND Array,IEICE Transactions on Electronics, Vol. E92-C, No. 5, pp. 653-658, May 2009 [SCIE][DOWNLOAD]
  23. Sang Hyuk Park, Sangwoo Kang, Seongjae Cho, Dong-Seup Lee, Jung Han Lee, Hong-Seon Yang Kwon-Chil Kang, Joung-Eob Lee, Jong Duk Lee, and Byung-Gook Park, Recessed Channel Dual Gate Single Electron Transistors (RCDG-SETs) for Room Temperature Operation, IEICE Transactions on Electronics, Vol. E92-C, No. 5, pp. 647-652, May 2009 [SCIE][DOWNLOAD]
  24. Jongwook Jeon, Ickhyun Song, Jong Duk Lee, Byung-Gook Park, and Hyungcheol ShinApplication of the Compact Channel Thermal Noise Model of Short Channel MOSFETs to CMOS RFIC Design, IEICE Transactions on Electronics, Vol. E92-C, No. 5, pp. 627-634, May 2009 [SCIE][DOWNLOAD]
  25. Seongjae Cho, Jung Hoon Lee, Gil Sung Lee, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, Design Consideration for Vertical Nonvolatile Memory Device Regarding Gate-Induced Barrier Lowering (GIBL), IEICE Transactions on Electronics, Vol. E92-C, No. 5, pp. 620-626, May 2009 [SCIE][DOWNLOAD]
  26. Hee-Sauk Jhon, Hakchul Jung, Minsuk Koo, Ickhyun Song, Hyungcheol Shin, 0.7 V supply highly linear subthreshold low-noise amplifier design for 2.4 GHz wireless sensor network applications, Microwave and Optical Technology Letters, May 2009 [SCI][DOWNLOAD]
  27. Yeonam Yoon, Hee-Sauk Jhon, Jongwook Jeon, Jaehong Lee, Hyungcheol Shin, Small-signal modeling of MOSFET cascode with merged diffusion, Solid State Electronics, May 2009 [SCI][DOWNLOAD]
  28. Daewoong Kang, Jinho Kim, Duckhyung Lee, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, Extraction of vertical, lateral locations and energies of hot-electrons-induced traps through the random telegraph noise, Japanese Journal of Applied Physics: Special Issues - Solid State Devices and Materials, April 2009 [SCI][DOWNLOAD]
  29. Jongwook Jeon, Jaehong Lee, Chan Hyeong Park, Hyunwoo Lee, Hansu Oh, Ho-Kyu Kang, Byung-Gook Park, and Hyungcheol Shin, Accurate extraction of excess channel thermal noise coefficient in berkeley short-channel insulated gate field-effect transistor model 4, Japanese Journal of Applied Physics: Special Issues - Solid State Devices and Materials, April 2009 [SCI][DOWNLOAD]
  30. Minsuk Koo, Hakchul Jung, Hee-Sauk Jhon, Byung-Gook Park, Jong Duk Lee, and , Hyungcheol Shin, Investigation of frequency dependent sensitivity of noise figure on device parameters in 65 nm CMOS, Journal of Semiconductor Technolegy and Science, March 2009 [DOWNLOAD]
  31. Junsoo Kim, Jaehong Lee, Youngmin Kwon, , Byung-Gook Park, Jong Duk Lee, and , Hyungcheol Shin, Extraction of ballistic parameters in 65 nm MOSFETs, Journal of Semiconductor Technolegy and Science, March 2009, March 2009 [DOWNLOAD]
  32. Keum-Dong Jung, Yoo Chul Kim, Byung-Gook Park, Hyungcheol Shin, Jong Duk Lee, Modeling and Parameter Extraction for the Series Resistance in Thin-Film Transistors, IEEE Transactions on Electron Devices, Vol. 56, No. 3, pp. 431-440, March 2009 [SCI][DOWNLOAD]
  33. Hee-Sauk Jhon, Ickhyun Song, Jongwook Jeon, Minsuk Koo, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, Low Power Size-Efficient CMOS UWB Low-Noise Amplifier Design, Microwave and Optical Technology Letters, vol. 51, no.2, pp. 494-496, Feb. 2009. [SCI][DOWNLOAD]
  34. Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Jong Duk Lee, and Byung-Gook Park, "A 2-Bit Recessed Channel Nonvolatile Memory Device With a Lifted Charge-Trapping Node," IEEE Trans. Nanotechnol., vol. 8, pp. 111-115, 2009 [SCI][DOWNLOAD]

2 0 0 8

 

  1. Ickhyun Song, Jongwook Jeon, Hee-Sauk Jhon, Junsoo Kim, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, A Simple Figure of Merit of RF MOSFET for Low-Noise Amplifier Design, Electron Device Letters, vol. 29, no.12, pp. 1380-1382, Dec. 2008 .[SCI] [DOWNLOAD]
  2. Seongjae Cho, Il Han Park, Jung Hoon Lee, Younghwan Son, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Dependence of Program Efficiency on Channel Conditions Regarding NOR-Type Flash Memory Devices Fabricated on a Silicon-on-Insulator (SOI) Substrate,"Journal of the Korean Physical Society, vol. 53, No. 6, pp. 3422-3426, December 2008.[SCI] [DOWNLOAD]
  3. Ickhyun Song, Hee-Sauk Jhon, Hakchul Jung, Minsuk Koo, and Hyungcheol Shin, A low power low noise amplifier with subthreshold operation in 130 nm CMOS technology, MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, vol.50, no.11, pp. 2762-2764, Nov. 2008[SCI] [DOWNLOAD]
  4. Byung-Kil Choi, Min-Kyu Jeong, Hyuck-In Kwon, Hyungcheol Shin, and Jong-Ho Lee, Compact current modeling of fully depleted symmetric double-Gate MetalOxideSemiconductor field effect transistors with doped short-channel, Japanese Journal of Applied Physics, vol.47, no.11, pp. 8253-8260, Nov. 2008[SCI] [DOWNLOAD]
  5. Hee-Sauk Jhon, Ickhyun Song, Jongwook Jeon, Hakchul Jung, Minsuk Koo, Byung-Gook Park, Jong Duk Lee and Hyungcheol Shin, 8mW 17/24 GHz dual-band CMOS low-noise amplifier for ISM-band application, IEE Electronics Letters, vol.44, no.23, pp. 1353-1354, Nov. 2008. [SCI] [DOWNLOAD]
  6. Kyung Rok Kim, Byung-Gook Park and R.W. Dutton, Numerical band-to-band tunnelling model for radio-frequency silicon tunnel diode with negative-differential resistance, IEE Electronics Letters, vol. 44, no. 23, pp. 1379-1381, Nov. 2008.[SCI] [DOWNLOAD]
  7. Junsoo Kim, Jaehong Lee, Ickhyun Song, Yoenam Yun, Jong Duk Lee, Byung-Gook Park, and Hyungcheol Shin, Accurate extraction of effective channel length and source/drain series resistance in ultra short-channel MOSFETs by iteration method, IEEE Transaction on Electron Devices, Vol. 55, No.10, pp.2779-2784, October 2008.[SCI] [DOWNLOAD]
  8. Jang-Gn Yun, Yoon Kim, Il Han Park, Jung Hoon Lee, Sangwoo Kang, Dong-Hua Lee, Seongjae Cho, Doo-Hyun Kim, Gil Sung Lee, Won-Bo Sim, Younghwan Son, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "Fabrication and characterization of fin SONOS flash memory with separated double-gate structure," Solid-State Electron., vol. 52, pp. 1498-1504, October 2008.[SCI] [DOWNLOAD]
  9. Ickhyun Song, Hee-Sauk Jhon, Hakchul Jung, Minsuk Koo, and Hyungcheol Shin, "Small size low noise amplifier with suppressed noise from gate resistance," Microwave and Optical Technology Letters, vol.50, no.9, pp.2300-2304, September 2008. .[SCI] [DOWNLOAD]
  10. Jong Duk Lee, Byung-Gook Park, and Keum-Dong Jung, "Reliability Issues of Bottom-Contact Pentacene Thin-Film Transistors," Saians Malaysiana, vol. 37, no. 3, pp.295-298, September 2008. [SCIE] [DOWNLOAD]
  11. Kyung Rok Kim, Byung-Gook Park and R.W. Dutton, "Modelling of band-to-band tunnelling in silicon-on-insulator transistor with degenerately doped floating body," IEE Electronics Letters, vol. 44, no. 18, pp. 1089-1090, Aug. 2008.[SCI] [DOWNLOAD]
  12. Seung-Hwan Seo, Se-Woon Kim, Jang-Uk Lee, Gu-Cheol Kang, Kang-Seob Roh, Kwan-Young Kim, Soon-Young Lee, Chang-Min Choi, Kwan-Jae Song, So-Ra Park, Jun-Hyun Park, Ki-Chan Jeon, Dong Myong Kim, Dae Hwan Kim, Hyungcheol Shin, Jong Duk Lee and Byung-Gook Park, "Channel width dependence of hot electron injection program/hot hole erase cycling behavior in silicon-oxide-nitride-oxide-silicon (SONOS) memories," Solid-State Electronics, vol. 52, iss. 6, pp. 844-848, Jun. 2008.[SCI] [DOWNLOAD]
  13. Seongjae CHO, Il Han PARK, Jung Hoon LEE, Jong Duk LEE, and Byung-Gook PARK, "Evaluation and Resolution for Nonideal Characteristics of Complementary Metal-Oxide-Semiconductor Devices Fabricated on Silicon-on-Insulator," Japanese Journal of Applied Physics, Vol. 47 No. 6 pp. 4408-4412, June 2008.[SCI] [DOWNLOAD]
  14. 김준수, 이재홍, 윤여남, 박병국, 이종덕, 신형철, "Extraction of effective carrier velocity and observation of velocity overshoot in sub-40 nm MOSFETs", Journal of Semiconductor Technology and Science, vol. 8 no. 2 pp.115-120, 2008. 6 [DOWNLOAD]
  15. Jang Gn YUN, Il Han PARK, Seongjae CHO, Jung Hoon LEE, Doo-Hyun KIM, Gil Sung LEE, Yoon KIM, Jong Duk LEE, and Byung-Gook PARK, Characterization of 2-bit Recessed Channel Memory with Lifted-Charge Trapping Node (L-CTN) Scheme, IEICE Transactions on Electronics, Vol. E91-C, No. 5, pp. 742-746, May 2008 [SCIE] [DOWNLOAD]
  16. Seongjae Cho, Il Han Park, Jung Hoon Lee, Jang-Gn Yun, Doo-Hyun Kim, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, Establishing Read Operation Bias Schemes for 3-D Pillar Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI), IEICE Transactions on Electronics, Vol. E91-C, No. 5, pp. 731-735, May 2008 [SCIE] [DOWNLOAD]
  17. Lee Hochul, Youngchang Yoon, Song Ickhyun, Hyungcheol Shin, "FN stress induced degradation on random telegraph signal noise in deep submicron NMOSFETs", IEICE Transactions on Electronics, vol. E91-C no. 5 pp.776-779, May. 2008 [SCIE] [DOWNLOAD]
  18. Sangwoo Kang, Dae-Hwan Kim, Il-Han Park, Jin-Ho Kim, Joung-Eob Lee, Jong Duk Lee, and Byung-Gook Park, "Self-aligned dual-gate single-electron transistors," Japanese Journal of Applied Physics, vol. 47, no. 4, pp. 3118-3122, Apr. 2008. [SCI] [DOWNLOAD]
  19. Lee Hochul, Youngchang Yoon, Jun Jongwook, Hyungcheol Shin, "Analysis of random telegraph signal noise in dual and single oxide device and its application to complementary metal oxide semiconductor image sensor readout circuit", Japanese Journal of Applied Physics Part 2-Letters & Express Letters, vol. 47 no. 4 pp.2602-2605, Apr. 2008 [SCI] [DOWNLOAD]
  20. Dae Woong Kang, Sungnam Jang, Kyongjoo Lee, Jinjoo Kim, Dongwon Chang, Hyukje Kwon, Wonseong Lee, Il Han Park, Junsoo Kim, Lee Jaehong, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Improving the cell characteristics using SiN liner at active edge in 4 gbits NAND flash memories", Japanese Journal of Applied Physics Part 1-Regular Papers Short Notes & Rev, vol. 47 no. 4 pp.2676-2679, Apr. 2008 [SCI] [DOWNLOAD]
  21. Jun Jongwook, Yoon Yeonam, Junsoo Kim, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "On the characteristics and spatial dependence of channel thermal noise in nanoscale MetalOixdeSemiconductor field effect transistors", Japanese Journal of Applied Physics Part 2-Letters & Express Letters, vol. 47 no. 4 pp.2636-2640, Apr. 2008 [SCI] [DOWNLOAD]
  22. Seungwon Yang, Lee Hochul, Hyungcheol Shin, "Simultaneous extraction of locations and energies of two independent traps in gate oxide from four-level random telegraph signal noise", Japanese Journal of Applied Physics Part 2-Letters & Express Letters, vol. 47 no. 4 pp.2606-2609, Apr. 2008 [SCI] [DOWNLOAD]
  23. Keum-Dong Jung, Yoo Chul Kim, Byeong-Ju Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "An Analytic Current-Voltage Equation for Top-Contact Organic Thin Film Transistors Including the Effects of Variable Series Resistance," Japanese Journal of Applied Physics, Vol. 47, No. 4, pp. 3174-3178, April, 2008 [SCI]  [DOWNLOAD]
  24. Seung-Hwan Seo, Gu-Cheol Kang, Kang Seob Roh, Kwan Young Kim, Sunyeong Lee, Kwan-Jae Song, Chang Min Choi, So Ra Park, Kichan Jeon, Jun-Hyun Park, Byung-Gook Park, Jong Duk Lee, Dong Myong Kim, Dae Hwan Kim, "Dynamic bias temperature instability-like behaviors under Fowler-Nordheim program/erase stress in nanoscale silicon-oxide-nitride-oxide-silicon memories", Appl. Phys. Lett., Vol. 92, pp. 133508 April 2008. [SCI] [DOWNLOAD]
  25. Junsoo Kim, Lee Jaehong, Song Ickhyun, Jong Duk Lee, Byung-Gook Park, Seungbum HONG, Hyoungsoo KO, Dong-Ki MIN, Hongsik PARK, Chulmin PARK, Juhwan JUNG, Hyungcheol Shin, "Characterization of sensitivity and resolution of silicon resistive probe", Japanese Journal of Applied Physics Part 2-Letters & Express Letters, vol. 47 no. 3 pp.1717-1722, Mar. 2008 [SCI] [DOWNLOAD]
  26. Song Ickhyun, MinSuk Koo, Jung Hakchul, Jhon Hee Sauk, Hyungcheol Shin, "Optimization of Cascode Configuration in CMOS Low-noise Amplifier", Microwave and Optical Technology Letters, vol. 50 no. 3 pp.646-649, Mar. 2008 [SCIE] [DOWNLOAD]

2 0 0 7

 

  1. Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Jong-Duk Lee, and Byung-Gook Park, "Formation of Si-Rich Silicon Nitride with Low Deposition Rate by Using LPCVD for Nanoscale Non-Volatile-Memory Application," Journal of the Korean Physical Society, Vol. 51, pp. S229~S233, December 2007. [SCI]  [DOWNLOAD]
  2. Sunyeong Lee, Ki-Chan Jeon, Jang-Uk Lee, Se-Woon Kim, Seung-Hwan Seo, Kang-Seob Roh, Gu-Cheol kang, Kwan-Young Kim, Chang-Min Choi, Kwan-Jae Song, So-Ra Park, Jun-Hyun Park, Dong Myong Kim, Dae Hwan Kim, Hyungcheol Shin, Jong Duk Lee, Byung-Gook Park, "Optical charge pumping technique for extracting interface states of nano-scale SONOS flash memories", Journal of the Korean Physical Society, vol. 51 no. 6 pp.2063-2068, Dec. 2007 [SCI]  [DOWNLOAD]
  1. Jang Uk Lee, Kang Seob Roh, Gu Cheol Kang, Seung Hwan Seo, Kwan Young Kim, Sunyeong Lee, Kwan Jae Song, Chang Min Choi, So Ra Park, Jun Hyun Park, Ki Chan Jeon, and Dae Hwan Kim, Byung-Gook Park and Jong Duk Lee, and Dong Myong Kim, "Optical capacitance-voltage characterization of charge traps in the trapping nitride layer of charge trapped flash memory devices," Appl. Phys. Lett., vol. 91, issue 22, p. 223511, Nov. 2007. [SCI] [DOWNLOAD]
  1. Jong Pil Kim, Woo Young Choi, Jae Young Song, Sang Wan Kim, Jong Duk Lee, and Byung-Gook Park, "Design and Fabrication of Asymmetric MOSFETs Using a Novel Self-Aligned Structure," IEEE Transactions on Electron Devices, Vol. 54, No. 11, pp. 2969-2974, November 2007. [SCI]  [DOWNLOAD]
  2. Hee-Sauk Jhon, Ickhyun Song, In Man Kang, and Hyungcheol Shin, 2.4 GHz ISM-Band Receiver Design in a 0.18 um Mixed Signal CMOS Process, IEEE Microwave and Wireless Components Letters, VOL. 17, NO. 10, pp. 736-738, October 2007 [SCI] [DOWNLOAD]
  3. 전희석, 윤여남, 송익현, 신형철, “회로면적에 효율적인 3 GHz CMOS LNA설계,” 대한 전자공학회지, 44, No. 10, pp. 33-37, Oct. 2007  [DOWNLOAD]
  4. Woo Young Choi, Byung-Gook Park, Jong Duk Lee, and Tsu-Jae King Liu, "Tunneling Field Effect Transistor (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec", IEEE Electron Device Letters, Vol. 28, No. 8, pp. 743-745, August 2007. [SCI]  [DOWNLOAD]
  5. Jongwook Jeon, Jong Duk Lee, Byung-Gook Park, and Hyungcheol Shin, "An analytical channel thermal noise model for deep-submicron MOSFETs with short channel effects," Solid-State Electronics, Vol. 51, No. 7, pp. 1034-1038, July 2007 [SCI] [DOWNLOAD]
  6. Youngho Jung, Hee Sauk Jhon, In Man Kang, Jong Duk Lee, Byung-Gook Park, and Hyungcheol Shin, "7GHz and 25.8GHz LC VCO Using 0.18 μm Mixed Signal CMOS Process," , ELEKTRIKA, Vol. 9, No. 1, pp. 48-51, June 2007.   [DOWNLOAD]
  7. Jongwook Jeon, Jong Duk Lee, Byung-Gook Park, and Hyungcheol Shin, "Analytical noise parameter model of short-channel RF MOSFETs," Journal of Semiconductor Technology and Science, vol. 7, no. 2, pp.88-93, June 2007   [DOWNLOAD]
  8. Myoung Gon Kang, In Man Kang, Young Ho Jung, and Hyungcheol Shin, "Separate extraction of gate resistance components in RF MOSFETs," IEEE Transactions on Electron Devices, Vol. 54 No. 6, pp.1459-1463, June 2007 [SCI] [DOWNLOAD]
  9. In Man Kang, Jong Duk Lee, and Hyungcheol Shin, "Extraction of π-type substrate resistance based on three-port measurement and the model verification up to 110 GHz," IEEE Electron Device Letters, vol. 28, no. 5, pp.425-427, May 2007 [SCI] [DOWNLOAD]
  10. Hoon Jeong, Ki-Whan Song, Il Han Park, Tae-Hun Kim, Yeun Seung Lee, Seong-Goo Kim, Jun Seo, Kyoungyong Cho, Kangyoon Lee, Hyungcheol Shin, Jong Duk Lee, Byung-Gook Park, "A New Capacitorless 1T DRAM Cell: Surrounding Gate MOSFET with Vertical Channel (SGVC cell)", IEEE Transactions on Nanotechnology, Vol. 6, No. 3, pp. 352-357, May 2007. [SCI]  [DOWNLOAD]
  11. Jong Pil Kim, Woo Young Choi, Jae Young Song, Seongjae Cho, Sang Wan Kim, Jong Duk Lee, and Byung-Gook Park, Design and Simulation of Asymmetric MOSFETs, IEICE Trans. Electron., Vol. E90-C, pp. 978-982, May 2007. [SCIE]  [DOWNLOAD]
  12. Hochul Lee, Youngchang Yoon, Seong-Jae Cho, and Hyungcheol Shin, "Accurate extraction of the trap depth from RTS noise data by including poly depletion effect and surface potential variaion in MOSFETs ", IEICE Transactions on Electronics, vol. no. pp.968-971, May. 2007 [SCIE] [DOWNLOAD]
  13. Seongjae Cho, Jang-Gn Yun, Il Han Park, Jung Hun Lee, Jong Pil Kim, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, Analyses on Current Characteristics of 3-D MOSFET Determined by Junction Doping Profiles for Nonvolatile Memory Devices, IEICE Trans. Electron., Vol. E90-C, pp. 988-993, May 2007. [SCIE]  [DOWNLOAD]
  14. In Man Kang, Jong Duk Lee, and Hyungcheol Shin, "Extraction of π-type substrate resistance based on three-port measurement and the model verification up to 110 GHz," , IEEE Electron Device Letters, Vol. 28, No. 5, pp. 425-427, May 2007. [SCI]  [DOWNLOAD]
  15. Hoon Jeong, Yeun Seung Lee, Sangwoo Kang, Il Han Park, Woo Young Choi, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "Capacitorless Dynamic Random Access Memory Cell with Highly Scalable Surrounding Gate Strcucture," Japanese Journal of Applied Physics, Vol. 46, No. 4B, pp. 2143-2147, April 2007. [SCI]  [DOWNLOAD]
  16. Dong-Wook Park, Cheon An Lee, Keum-Dong Jung, Byeong-Ju Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Electrically Stable Organic Thin-Film Transistors and Circuits Using Organic/Inorganic Double-Layer Insulator", Japanese Journal of Applied Physics, Vol. 46, No. 4B, pp. 2640-2644, April 2007. [SCI]  [DOWNLOAD]
  17. Cheon An Lee, Dong-Wook Park, Keum-Dong Jung, Jong Duk Lee, and Byung-Gook Park, "Full-Swing Pentacene Organic Inverter with Long-Channel Driver and Short-Channel Load", Japanese Journal of Applied Physics, Vol. 46, No. 4B, pp. 2661-2665, April 2007. [SCI]  [DOWNLOAD]
  18. Jae Young Song, Woo Young Choi, Jong Pil Kim, Sang Wan Kim, Jong Duk Lee, and Byung-Gook Park, "Novel Gate-All-Around Metal-Oxide-Semicondurctor Field Effect Transistors with Self-Aligned Structure", Japanese Journal of Applied Physics, Vol. 46, No. 4B, pp. 2046-2049, April 2007. [SCI]  [DOWNLOAD]
  19. Woo Young Choi, Jong Duk Lee, and Byung-Gook Park, "Novel Tunneling Devices with Multi-Functionality", Japanese Journal of Applied Physics, Vol. 46, No. 4B, pp. 2622-2625, April 2007. [SCI]  [DOWNLOAD]
  20. Y. S. Yu, D. H. Kim, J. D. Lee, B.-G. Park, S. W. Hwang, and D. Ahn, Transport Spectroscopy of A Quantum Dot in a Silicon-on-Insulator (SOI) MOSFET, Journal of Korean Physical Society, Vol. 50, No. 3, pp. 885-888, March 2007. [SCI]  [DOWNLOAD]
  21. Keum-Dong Jung, Cheon An Lee, Dong-Wook Park, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Admittance Measurements on OFET Channel and Its Modeling With R-C Network," IEEE Electron Device Letters, Vol. 28, No. 3, pp. 204-206, March 2007. [SCI]  [DOWNLOAD]
  22. Kyu Il Han, Yong Min Park, Sung Kim, Suk-Ho Choi, Kyung Joong Kim, Il Han Park, and Byung-Gook Park, "Enhancement of Memory Performance Using Doubly Stacked Si-Nanocrystal Floating Gates Prepared by Ion Beam Sputtering in UHV," IEEE Transactions on Electron Devices, Vol. 54, No. 2, pp. 359-362, February 2007. [SCI]  [DOWNLOAD]
  23. Woo Young Choi, Jong Duk Lee, and Byung-Gook Park, "Integration Process of Impact-Ionization Metal-Oxide-Semiconductor Devices with Tunneling Field-Effect-Transistors and Metal-Oxide-Semiconductor Field-Effect Transistors," Japanese Journal of Applied Physics, Vol. 46, No. 1, Jan. 2007, pp. 122~124. [SCI]  [DOWNLOAD]

 

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  1. Seung-Hwan Song, Kyung Rok Kim, Jin Ho Kim, Sangwoo Kang, Kwon Chil Kang, Jong Duk Lee, and Byung-Gook Park, "Negative Differential Transconductance Characteristics and Inter-Band Tunneling Mechanism of Fabricated FITETs," Journal of Korean Physical Society, Vol. 49, Dec. 2006, pp. S790~S794. [SCI]  [DOWNLOAD]
  2. Dong-Wook Park, Cheon An Lee, Keum-Dong Jung, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Low hysteresis pentacene thin-film transistors using SiO2/cross-linked poly(vinyl alcohol) gate dielectric," Appl. Phys. Lett., Vol. 89, pp. 263507-263509, Dec. 2006 [SCI]  [DOWNLOAD]
  3. Cheon An Lee, Dong-Wook Park, Keum-Dong Jung, Byung-ju Kim, Yoo Chul Kim, Jong Duk Lee, and Byung-Gook Park, "Hysteresis mechanism in pentacene thin-film transistors with poly(4-vinyl phenol) gate insulator," Appl. Phys. Lett., Vol. 89, pp. 262120-262122, Dec. 2006 [SCI]  [DOWNLOAD]
  4. Hyungcheol Shin, Seyoung Kim, Jongwook Jeon, "Analytical thermal noise model of deep-submicron MOSFETs", Journal of Semiconductor Technology and Science," vol. 6 no. 3 pp.206-209, 2006. 9. [DOWNLOAD]
  5. Tae Hun Kim, Il Han Park, Jong Duk Lee, Hyung Cheol Shin, and Byung-Gook Park, "Electron trap density distribution of Si-rich silicon nitride extracted using the modified negative charge decay model of silicon-oxide-nitrideoxide-silicon structure at elevated temperatures," Appl. Phys. Lett., Vol. 89, Issue 6, p. 063508, Aug. 2006. [SCI]  [DOWNLOAD]
  6. Cheon An Lee, Sung Hun Jin, Keum Dong Jung, Jong Duk Lee, Byung-Gook Park, "Full-swing pentacene organic inverter with enhancement-mode driver and depletion-mode load," Solid-State Electronics, Vol. 50, Issues 7-8, pp. 1216-1218, July-August 2006. [SCI]  [DOWNLOAD]
  7. Woo Young Choi, Byung Yong Choi, Dong-Won Kim, Choong-Ho Lee, Donggun Park, Jong Duk Lee, and Byung-Gook Park, "25-nm Programmable Virtual Source/Drain MOSFETs Using a Twin SONOS Memory Structure," Solid-State Electronics, Vol. 50, Issue 6, pp. 914-919, June 2006. [SCI]  [DOWNLOAD]
  8. Cheon An Lee, Dong Wook Park, Sung Hun Jin, Il Han Park, Jong Duk Lee, and Byung-Gook Park, "Hysteresis mechanism and reduction method in the bottom-contact pentacene thin-film transistors with cross-linked poly(vinyl alcohol) gate insulator," Appl. Phys. Lett., Vol. 88, Issue 25, pp. 252102, June 2006. [SCI]  [DOWNLOAD]
  9. Hyungcheol Shin, Young June Park, Hong Shick Min, "Polarity-Dependent device degradation in SONOS transistors due to gate conduction under nonvolatile memory operations", IEEE transactions on device and materials reliability, vol. 6 no. 2 pp.334-342, Jun. 2006 [SCI]  [DOWNLOAD]
  10. Il Hwan Cho, Tai-Su Park, Jeong Dong Choe, Hye Jin Cho, Donggun Park, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, and Jong-Ho Lee, "Fabrication and characteristics of P-channel silicon-oxide-nitride-oxidesilicon flash memory device based on bulk fin shaped field effect transistor structure," Journal of Vacuum Science and Technology B, Vol. 24, No. 3, pp. 1266-1270, May/June 2006.[SCI]  [DOWNLOAD]
  11. Il Han Park, Tae Hun Kim, Seongjae Cho, Jung Hoon Lee, Jong Duk Lee, and Byung-Gook Park, "Depletion-Enhanced Body-Isolation (DEBI) Array on SOI for Highly Scalable and Reliable NAND Flash Memories," IEEE Transactions on Nanotechnology, Vol. 5, No. 3, pp. 201-204, May 2006. [SCIE]  [DOWNLOAD]
  12. In Man Kang, Hyungcheol Shin, "Non-Quasi-Static small signal modeling and analytical parameter extraction of SOI FinFETs", IEEE Transactions on Nanotechnology, vol. 5 no. 3 pp.205-210, May. 2006.  [SCIE]  [DOWNLOAD]
  13. Seung-Hwan Song, Kyung Rok Kim, Sangwoo Kang, Jin Ho Kim, Jung Im Huh, Kwon Chil Kang, Ki-Whan Song, Jong Duk Lee, and Byung-Gook Park, "Analytical Modeling of Field-Induced Interband Tunneling-Effect Transistors and Its Application," IEEE Transactions on Nanotechnology, Vol. 5, No. 3, pp. 192-200, May 2006. [SCIE]  [DOWNLOAD]
  14. Jae Young Song, Woo Young Choi, Ju Hee Park, Jong Duk Lee, and Byung-Gook Park, "Design Optimization of Gate-All-Around (GAA) MOSFETs," IEEE Transactions on Nanotechnology, Vol. 5, No. 3, pp. 186-191, May 2006. [SCIE]  [DOWNLOAD]
  15. Seongjae Cho, Il Han Park, Tae Hun Kim, Jae Sung Sim, Ki-Whan Song, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Design and Optimization of Two-Bit Double-Gate Nonvolatile Memory Cell for Highly Reliable Operation," IEEE Transactions on Nanotechnology, Vol. 5, No. 3, pp. 180-185, May 2006. [SCIE]  [DOWNLOAD]
  16. Woo Young Choi, Jae Young Song, Jong Duk Lee, and Byung-Gook Park, "Effect of Source Extension Junction Depth and Substrate Doping Concentration on I-MOS Device Characteristics," IEEE Transactions on Electron Devices, Vol. 53, No. 5, pp. 1282-1285, May 2006. [SCI]  [DOWNLOAD]
  17. Woo Yong Choi, Jong Duk Lee, and Byung-Gook Park, "Characterization and Design Consideration of 80-nm Self-Aligned N-/P-Channel I-MOS Devices," Journal of Semiconductor Technology and Science, Vol. 6, No. 1, pp. 43-51, March 2006.  [DOWNLOAD]
  18. Sung Hun Jin, Keum Dong Jung, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, "Grain size effects on contact resistance of top-contact pentacene TFTs," Synthetic Metals, pp. 196-201, January 2006. [SCI]  [DOWNLOAD]

 

2 0 0 5

 

  1. Sung Hun Jin, Cheon An Lee, Keum Dong Jung, Hyungcheol Shin, Byung-Gook Park, and Jong Duk Lee, "Performance Improvement of Scaled-Down Top-Contact OTFTs by Two-Step-Deposition of Pentacene," IEEE Electron Device Letters, Vol. 26, No. 12, pp. 903-905, December 2005. [SCI]  [DOWNLOAD]
  2. Sang Don Lee, Hyungcheol Shin, Young June Park, and Hong Shick Min, "Gate conduction mechanism in nonvolatille-dynamic random access Memory(NVDRAM) cell transistors", Journal of the Korean Physical Society, vol. 47 no. pp.387-391, Nov. 2005 [SCI] [DOWNLOAD]
  3. Jeong-Hyong Yi, Hyungcheol Shin, Young June Park, Hong Shick Min, 이상돈, 안진홍, "Gate conduction mechanism in nonvolatille-dynamic random access Memory(NVDRAM) cell transistors", Journal of the Korean Physical Society, vol. 47 no. pp.387-391, Nov. 2005 [SCI] [DOWNLOAD]
  4. Myoung Gon Kang, Joonho Gil, Hyungcheol Shin, "A simple parameter extraction method of Spiral On-chip inductors", IEEE Transactions on Electron Devices, vol. 52 no. 9 pp.1976-1981, Sep. 2005 [SCI] [DOWNLOAD]
  5. B.Y. Choi, B.-G. Park, J.D. Lee, H. Shin, Y.K. Lee, K.H. Bai, D.-D. Kim, D.-W. Kim, C.-H. Lee and D. Park, "Reliable 2-bit/cell NVM technology using twin SONOS memory transistor," IEE Electronics Letters, Vol. 41, No. 19, pp. 1086-1087, September 2005.[SCI]  [DOWNLOAD]
  6. Seongjae Cho, Il Han Park, Tae Hun Kim, Jung Hoon Lee, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Quantitative Analysis on Voltage Schemes for Reliable operations of a Floating Gate Type Double Gate Nonvolatile Memory Cell ," Journal of Semiconductor Technology and Science, Vol. 5, No. 3, pp. 195-203, September 2005. [DOWNLOAD]
  7. Byung-Gook Park, Byung Yong Choi, Woo Young Choi, Yong Kyu Lee, Jong Duk Lee, Hyungcheol Shin, Suk-Kang Sung, Tae-Yong Kim, Eun Suk Cho, Byung Kyu Cho, Keun Hee Bai, Dong-Dae Kim, Dong-Won Kim, Choong-Ho Lee and Donggun Park, "Highly Manufacturable and Reliable 80-nm Gate Twin Silicon-Oxide-Nitride-Oxide-Silicon Memory Transistor," Jpn. J. Appl. Phys. Vol. 44, pp. L 1214-L 1217, No. 39, September 2005. [SCI] [DOWNLOAD]
  8. Ki-Whan Song, Yong Kyu Lee, Jae Sung Sim, Hoon Jeoung, Jong Duk Lee, Byung-Gook Park, You Seung Jin, and Young-Wug Kim, "SET/CMOS Hybrid Process and Multiband Filtering Circuits," IEEE Transactions on Electron Devices, Vol. 52, No. 8, pp. 1845-1850, August 2005. [SCI]  [DOWNLOAD]
  9. Sang-Don Lee, Jin-Hong Ahn, Hyungcheol Shin, Young June Park, and Hong Shick Min, "Device degradation model for polysilicon-oxide-nitride-oxidesilicon (SONOS) based on anode hole fluence", Microelectronic Engineering, vol. 80 no. pp.329-332, Jun. 2005 [SCI]  [DOWNLOAD]
  10. Chang-Bum Park, Keum-Dong Jung, Sung Hun Jin, Byung-Gook Park, and Jong Duk Lee, "Pentacene-based Thin Film Transistors with Improved Mobility Characteristics using Hybrid Gate Insulator," Journal of Information Display, vol. 6, no. 2, pp. 16-18, June 2005.   [DOWNLOAD]
  11. Woo Young Choi, Jae Young Song, Jong Duk Lee, Young June Park, and Byung-Gook Park, "A Novel Biasing Scheme for I-MOS (Impact-Ionization MOS) Devices," IEEE Transactions on Nanotechnology, Vol. 4, No. 3, pp. 322-325, May 2005. [SCIE]   [DOWNLOAD]
  12. Kyung Rok Kim, Hyun Ho Kim, Ki-Whan Song, Jung Im Huh, Jong Duk Lee, and Byung-Gook Park, "Field-Induced Interband Tunneling Effect Transistor (FITET) With Negative-Differential Transconductance and Negative-Differential Conductance," IEEE Transactions on Nanotechnology, Vol. 4, No. 3, pp. 317-321, May 2005. [SCIE]   [DOWNLOAD]
  13. Ki-Whan Song, Yong Kyu Lee, Jae Sung Sim, Kyung Rok Kim, Jong Duk Lee, Byung-Gook Park, Young Sub You, Joo-On Park, You Seung Jin and Young-Wug Kim, "Complementary Self-Biased Logics Based on Single-Electron Transistor (SET)/CMOS Hybrid Process," Jpn. J. Appl. Phys. Vol. 44, pp. 2618-2622, No. 4B, April 2005. [SCI] [DOWNLOAD]
  14. Woo Young Choi, Jae Young Song, Jong Duk Lee, Young June Park, and Byung Gook Park, "100-nm n-/p-Channel I-MOS Using a Novel Self-Aligned Structure," IEEE Electron Device Letters, Vol. 26, No. 4, pp. 261-263, April 2005. [SCI]  [DOWNLOAD]
  15. Kwangseok Han, Joonho Gil, Seongsik Song, Jeonghu Han, and Hyungcheol Shin, "Complete high-frequency thermal noise modeling of short-channel MOSFETs and design of 5.2-GHz low noise amplifier", IEEE Journal of Solid-State Circuits, vol. 40 no. 3 pp.726-735, Mar. 2005 [SCI]  [DOWNLOAD]
  16. Sang Min Yi, Sung Hun Jin, Jong Duk Lee and Chong Nam Chu, "Fabrication of a high-aspect-ratio stainless steel shadow mask and its application to pentacene thin-film transistors," Journal of Micormechanics and Microengineering, Vol. 15, No. 2, pp. 263-269, February 2005. [SCI]  [DOWNLOAD]
  17. Hyung Soo Uh, Sung Woo Ko, Jong Duk Lee, "Growth and field emission properties of carbon nanotubes on rapid thermal annealed Ni catalyst using PECVD," Diamond & Related Materials, Vol. 14, pp. 850-854, 2005. [SCI]  [DOWNLOAD]
  18. K. H. Cho, B. H. Choi, S. H. Son, and S. W. Hwang, D. Ahn, B.-G. Park, B. Naser, J.-F. Lin, and J. P. Bird, "Evidence of double layer quantum dot formation in a silicon-on-insulator nanowire transistor," Appl. Phys. Lett., Vol. 86, No. 4, pp. 043101-1~043101-3, Jan. 2005. [SCI] [DOWNLOAD]

 

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  1. Sang Jik Kwon, Hak June Chung, Sang Heon Lee, Hyung Wook Choi, Young Hwa Shin, Dal Ho Lee, and Jong Duk Lee, "Characterization of Triod-type CNT-FED Fabricated using Photo-sensitive CNT Paste," Journal of Information Display, Vol. 5, No. 4, pp. 18-22, December, 2004. [DOWNLOAD]
  2. Kwnagseok Han, Kwyro Lee, and Hyungcheol Shin, "Drain current thermal noise modeling for deep submicron n- and p-channel MOSFETs", Solid-State Electronics, vol. 48 no. 12 pp.2255-2262, Dec. 2004 [SCI] [DOWNLOAD]
  3. Junsoo Kim, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "MOSFETs with Biased Spacer Having Different Work Function from the Gate," Journal of Korean Physical Society, Vol. 45, No. 5, pp. 1093-1097, November 2004. [SCI]  [DOWNLOAD]
  4. Sang Sik Park, Hyuck In Kwon, O Jun Kwon, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, Yong Jei Lee and Yong Hee Lee, "The Influence of Deuterium Annealing on the Evolution of Interface Trap Capture Cross Sections in n-MOSFET under Channel-Hot-Electron and Fowler-Nordheim Stresses," Journal of Korean Physical Society, Vol. 45, No. 5, pp. 1300-1303, November 2004. [SCI]  [DOWNLOAD]
  5. Woo Young Choi, Hwi Kim, Byoungho Lee, Jong Duk Lee, and Byung-Gook Park, "Stable Threshold Voltage Extraction Using Tikhonovs Regularization Theory," IEEE Transactions on Electron Devices, Vol. 51, No. 11, pp. 1833-1839, November 2004. [SCI]  [DOWNLOAD]
  6. Jae Sung Sim, Jong Duk Lee and Byung-Gook Park, "The simulation of single-charging effects in the programming characteristics of nanocrystal memories," Nanotechnology, Vol. 15, No. 10, pp. S603-S611, October 2004. [SCI]  [DOWNLOAD]
  7. Yong Kyu Lee, Jong Duk Lee, Byung-Gook Park, Sung Taeg Kang, Chilhee Chung, and Donggun Park, "Inverted sidewall spacer and inner offset oxide process for excellent 2-bit silicon-oxide-nitride-oxide-silicon memory under 100 nm gate length", Journal of Vacuum Science and Technology B, Vol. 22, No. 5, pp. 2493-2498, Sep./Oct. 2004 [SCI]  [DOWNLOAD]
  8. Hyung Soo Uh, Soo Myun Lee, Pil Goo Jeon, Byung Hwak Kwak, Sang Sik Park, Sang Jik Kwon, Euo Sik Cho, Sung Woo Ko, Jong Duk Lee, Chun Gyoo Lee, "Selective growth of carbon nanotubes and their application to triode-type field emitter arrays," Thin Solid Films, Volume 462-463, pp. 19-23, September, 2004. [SCI]  [DOWNLOAD]
  9. Euo Sik Cho, Cheon An Lee, Gwanghyeon Baek, Hyung Soo Uh, Sang Jik Kwon, Hyungcheol Shin, Byung-Gook Park, and Jong Duk Lee, "Effects of phosphorus implantation and subsequent growth on diamond," Thin Solid Films, Volume 462-463, pp. 24-28, September, 2004. [SCI]  [DOWNLOAD]
  10. Yong Kyu Lee, Suk Kang Sung, Jae Sung Sim, Ki Whan Song, Jong Duk Lee, Byung-Gook Park, Sung Taeg Kang, Chilhee Chung, Donggun Park, Kinam Kim, "Scalable 2-bit silicon-oxide-nitride-oxide-silicon (SONOS) memory with physically separated local nitrides under a merged gate," Solid-State Electronics, Vol. 48, Issues 10-11, pp. 1771-1775, October-November 2004. [SCI]  [DOWNLOAD]
  11. Hyuck In Kwon, O Jun Kwon, Hyungcheol Shin, Byung-Gook Park, Sang Sik Park, and Jong Duk Lee, "The Effects of Deuterium Annealing on the Reduction of Dark Currents in the CMOS APS" IEEE Transactions on Electron Devices, Vol. 51, No. 8, pp. 1346-1349, August 2004. [SCI] [DOWNLOAD]
  12. Seong-Sik Song, Seung-Wook Lee, Joonho Gil, and Hyungcheol Shin, "Simple wide-band metal-insulator-metal (MIM) capacitor model for RF applications and effect of substrate grounded shields", Japanese Journal of Applied Physics Part 1-Regular Papers Short Notes & Rev, vol. 43 no. 4B pp.1746-1751, Jul. 2004 [SCI] [DOWNLOAD]
  13. Tae Hun Kim, Jae Sung Sim, Jong Duk Lee, Hyung Cheol Shin, and Byung-Gook Park, "Charge decay characteristics of silicon-oxide-nitride-oxide-silicon structure at elevated temperatures and extraction of the nitride trap density distribution," Appl. Phys. Lett., Vol. 85, No. 4, pp. 660-662, July 2004. [SCI] [DOWNLOAD]
  14. Kyung Rok Kim, Dae Hwan Kim, Ki-Whan Song, Gwanghyeon Baek, Hyun Ho Kim, Jung Im Huh, Jong Duk Lee, and Byung Gook Park, "Silicon-Based Field-Induced Band-to-band Tunneling Effect Transistor," IEEE Electron Device Letters, Vol. 25, No. 6, pp. 439-441, June 2004. [SCI]  [DOWNLOAD]
  15. Byung-Gook Park, Dong-Soo Woo and Jong Duk Lee, "Self-aligned FinFETs with Wide Source/Drain Regions," Transactions of the Materials Research Society of Japan, Vol. 29, No. 3, pp.701-705, May 2004. [DOWNLOAD]
  16. Yong Kyu Lee, Ki Whan Song, Jae Woong Hyun, Jong Duk Lee, Byung Gook Park, Sung Taeg Kang, Jeong Dong Choe, Sang Yeon Han, Jeong Nam Han, Sung Woo Lee, O. Ik Kwon, Chilhee Chung, Donggun Park, and Kinam Kim, "Twin SONOS Memory With 30-nm Storage Nodes under a Merged Gate Fabricated With Inverted Sidewall and Damascene Process," IEEE Electron Device Letters, Vol. 25, No. 5, pp. 317-319, May 2004. [SCI]  [DOWNLOAD]
  17. Soodoo Chae, Changju Lee, Juhyung Kim, Sukkang Sung, Jaeseong Sim, Moonkyung Kim, Sewook Yoon, Younseok Jeong, Wonil Ryu, Taehun Kim, Byung-Gook Park, Jo-won Lee and Chungwoo Kim, "70 nm Silicon-Oxide-Nitride-Oxide-Silicon Nonvolatile Memory Devices Using Fowler-Nordheim Programming and Hot Hole Erase Method," Jpn. J. Appl. Phys. Vol. 43, pp. 2207-2210, Part 1, No. 4B, April 2004. [SCI] [DOWNLOAD]
  18. Jae Sung Sim, Jihye Kong, Jong Duk Lee and Byung-Gook Park, "Monte Carlo Simulation of Single-Electron Nanocrystal Memories," Jpn. J. Appl. Phys. Vol. 43, pp. 2041-2045, Part 1, No. 4B, April 2004. [SCI] [DOWNLOAD]
  19. Kyung Rok Kim, Ki-Whan Song, Dae Hwan Kim, Gwanghyeon Baek, Hyun Ho Kim, Jung Im Huh, Jong Duk Lee, Byung-Gook Park, "Analytical Modeling of Realistic Single-Electron Transistors Based on Metal-Oxide-Semiconductor Structure with a Unique Distribution Function in the Coulomb-Blockade Oscillation Region," Jpn. J. Appl. Phys. Vol. 43, pp. 2031-2035, Part 1, No. 4B, April 2004. [SCI] [DOWNLOAD]
  20. Woo Young Choi, Dong Soo Woo, Byung Yong Choi, Jong Duk Lee and Byung-Gook Park, "Stable Extraction of Threshold Voltage Using Transconductance Change Method for CMOS Modeling, Simulation and Characterization," Jpn. J. Appl. Phys. Vol. 43, pp. 1759-1762, Part 1, No. 4B, April 2004. [SCI] [DOWNLOAD]
  21. Kyung Rok Kim, Dae Hwan Kim,  Jong Duk Lee, and Byung-Gook Park, "Coulomb Oscillations Based on Band-to-band Tunneling in a Degenerately Doped Silicon Metal-Oxide-Semiconductor Field-Effect Transistor," Virtual Journal of Nanoscale Science & Technology, Volume 9, Issue 16, (APL Vol. 84, pp. 3178-3180), Apr. 2004. [SCI] [DOWNLOAD]
  22. Kyung Rok Kim, Dae Hwan Kim, Jong Duk Lee, Byung-Gook Park, "Coulomb Oscillations Based on Band-to-band Tunneling in a Degenerately Doped Silicon Metal-Oxide-Semiconductor Field-Effect Transistor," Appl. Phys. Lett., Vol. 84, No. 16, pp. 3178~3180, Apr. 2004. [SCI] [DOWNLOAD]
  23. Cheon An Lee, Sung Hun Jin, Hyuck In Kwon, Il Whan Cho, Jihye Kong, Chang Ju Lee, Myung Won Lee, Jae Woo Kyung, Jong Duk Lee, and Byung-Gook Park, "A High Voltage NMOSFET Fabricated by using a Standard CMOS Logic Process as a Pixel-driving Transistor for the OLED on the Silicon Substrate," Journal of Information Display, Vol. 5, No. 1, pp. 28-33, March, 2004. [DOWNLOAD]
  24. Kwangseok Han, Kwyro Lee, and Hyungcheol Shin, "Analytical drain thermal noise current model valid for deep submicron MOSFETs", IEEE Transactions on Electron Devices, vol. 51 no. 2 pp.261-269, Feb. 2004 [SCI] [DOWNLOAD]
  25. Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Stable Extraction of Linearity (VIP3) for Nanoscale RF CMOS Devices," IEEE Microwave and Wireless Components Letters, Vol. 14, No 2, pp. 83-85, February 2004. [SCI] [DOWNLOAD]
  26. Hyuck In Kwon, In Man Kang, Byung-Gook Park, Sang Sik Park, and Jong Duk Lee, "The Analysis of Dark Signals in the CMOS APS Imagers From the Characterization of Test Structures," IEEE Transactions on Electron Devices, Vol. 51, No. 2, pp. 178-184, Feb. 2004. [SCI] [DOWNLOAD]
  27. Kwangseok Han, Kwyro Lee, and Hyungcheol Shin, "Derivation of drain current thermal noise for short-channel MOSFETs including the velocity saturation effect ", Journal of the Korean Physical Society, vol. 44 no. 1 pp.97-102, Jan. 2004 [SCI] [DOWNLOAD]
  28. Hyunjin Lee, and Hyungcheol Shin, "Design of a 20 nm T-Gate MOSFET with a Source/Drain-to-Gate Non-Overlapped Structure ", Journal of the Korean Physical Society, vol. 44 no. 1 pp.65-68, Jan. 2004 [SCI] [DOWNLOAD]
  29. Hyuck In Kwon, In Man Kang, Byung-Gook Park, Jong Duk Lee, Sang Sik Park, Jung Chak Ahn, and Yong Hee Lee, "Effects of electrical stress on mid-gap interface trap density and capture cross sections in n-MOSFETs characterized by pulsed interface probing measurements," Microelectronics Reliability, Vol. 44, Issue 1, pp. 47-51, Jan. 2004. [SCI] [DOWNLOAD]
  30. Yong Jin Yoon, Hyuck In Kwon, Jong Duk Lee, Byung-Gook Park, Nam Seog Kim, Uk Rae Cho, and Hyun Geun Byun, "Synchronous Mirror Delay for Multiphase Locking," IEEE Journal of Solid-State Circuits, Vol. 39, No. 1, pp. 150-156, Jan. 2004. [SCI]  [DOWNLOAD]
  31. Sung Hun Jin, Jin Wook Kim, Chun An Lee, Byung-Gook Park, and Jong Duk Lee, "Surface-State Modification of OTFT Gate Insulators by Using a Dilute PMMA Solution," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 185-189, January 2004. [SCI]  [DOWNLOAD]
  32. Sung Hun Jin, Jae Sung Yu, Chun An Lee, Jin Wook Kim, Byung-Gook Park, and Jong Duk Lee, "Pentacene OTFTs with PVA Gate Insulators on a Flexible Substrate," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 181-184, January 2004. [SCI]  [DOWNLOAD]
  33. Euo Sik Cho, Byung-Gook Park, Jong Duk Lee, Hyung Soo Uh, and Sang Jik Kwon, "Effect of Phosphorus Implantation and Subsequent Growth on the Surface Morphologies and the Electrical Properties of Diamond," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 153-156, January 2004. [SCI]  [DOWNLOAD]
  34. Ki-Whan Song, Kyung Rok Kim, Jong Duk Lee, Byung-Gook Park, Sang-Hoon Lee, and Dae Hwan Kim, "A SPICE Model of Realistic Single-Electron Transistors and Its Application to Multiple-Valued Logic," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 121-124, January 2004. [SCI]  [DOWNLOAD]
  35. Il Hwan Cho, Byung Gook Park, Jong Duk Lee, Tai-su Park, Si Young Choi and Jong Ho Lee, "Body-Tied Double-Gate SONOS Flash (Omega Flash) Memory Device Built on a Bulk Si wafer," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 83-86, January 2004. [SCI]  [DOWNLOAD]
  36. In Man Kang, Hyuck In Kwon, Myung Won Lee, Byung-Gook Park, Jong Duk Lee, Sang Sik Park, Jung Chak Ahn, and Yong Hee Lee, "Characteristics of Conventional STI Process-Related Deep Level Traps in Silicon," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 69-72, January 2004. [SCI]  [DOWNLOAD]
  37. Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Reverse-Order Source/Drain with Double Offset Spacer Design Optimization for Sub-50-nm Low-Power MOSFETs," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 60-64, January 2004. [SCI]  [DOWNLOAD]
  38. Hyuck In Kwon, In Man Kang, Byung-Gook Park, Jong Duk Lee, Woo Suk Hyun, Sang Sik Park, Jung Chak Ahn, and Yong Hee Lee, "Effects of Electrical Stress on the Mid-Gap Interface Trap Density and the Capture Cross Sections Characterized by Pulsed Interface Probing (PIP) Measurements," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 46-49, January 2004. [SCI]  [DOWNLOAD]

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  1. Suk-Kang Sung, Il Han Park, Chang Ju Lee, Yong Kyu Lee, Jong Duk Lee, Byung-Gook Park,Soo Doo Chae, Chung Woo Kim, "Fabrication and Program/Erase Characteristics of 30-nm SONOS Nonvolatile Memory Devices," IEEE Transactions on Nanotechnology, Vol. 2, Issue 4, pp. 258-264, Dec. 2003. [SCIE]   [DOWNLOAD]
  2. Yong Kyu Lee, Tae Hun Kim, Sang Hoon Lee, Jong Duk Lee and Byung-Gook Park, "Twin-Bit Silicon-Oxide-Nitride-Oxide-Silicon(SONOS) Memory by Inverted Sidewall Patterning (TSM-ISP)," IEEE Transactions on Nanotechnology, Vol. 2, Issue 4, pp. 246-252, Dec. 2003. [SCIE]   [DOWNLOAD]
  3. Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Reverse-Order Source/Drain Formation with Double Offset Spacer (RODOS) for Low-Power and High-Speed Application," IEEE Transactions on Nanotechnology, Vol. 2, Issue 4, pp. 210-216, Dec. 2003. [SCIE]   [DOWNLOAD]
  4. Joonho Gil, Seong-sik Song, Hyungjin Lee, and Hyungcheol Shin "A -119.2 dBc/Hz at 1 MHz, 1.5 mW, fully intergrated, 2.5-GHz, CMOS VCO using helical inductors ", IEEE Microwave and Wireless Components Letters, vol. 13 no. 11 pp.457-459, Nov. 2003 [SCI] [DOWNLOAD]
  5. Hyung Soo Uh, Soo Myun Lee, Seok Rim Choi, Sang Sik Park, Euo Sik Cho, Jong Duk Lee, and Sang Jik Kwon, "Effect of Plasma Pretreatment on the Structure and Emission Characteristics of Carbon Nanotubes," Journal of Korean Physical Society, Vol. 43, No. 5, pp. 929~934, November 2003.[SCI]  [DOWNLOAD]
  6. Joonho Gil, and Hyungcheol Shin "A simple wide-band On-chip inductor model for silicon-based RF ICs", IEEE Transactions on Microwave Theory and Techniques, vol. 51 no. 9 pp.2003-2008, Sep. 2003 [SCI] [DOWNLOAD]
  7. Seong-sik Song, and Hyungcheol Shin, "An RF model of the accumulation-mode MOS varactor valid in both accumulation and depletion regions", IEEE Transactions on Electron Devices, vol. 50 no. 9 pp.1997-1999, Sep. 2003 [SCI] [DOWNLOAD]
  8. Sang Jik Kwon, Tae Ho Kim, Byeong Kyoo Shon, Euo Sik Cho, Jong Duk Lee, Hyung Soo Uh, Sung Hee Cho, and Chun Gyoo Lee, "A Vacuum In-Line Sealing Technology of the Screen Printed CNT-FEA," Journal of Information Display, Vol. 4, No. 3, pp. 6-11, September, 2003. [DOWNLOAD]
  9. Byung-Gook Park, Dae Hwan Kim, Kyung Rok Kim, Ki-Whan Song, Jong Duk Lee, "Single-electron transistors fabricated with sidewall spacer patterning," Superlattices and Microstructures, Vol. 34, pp. 231-239, September-December 2003. [SCI] [DOWNLOAD]
  10. K.H. Cho, S.H. Son, S.H. Hong, B.C. Kim, S.W. Hwang, D. Ahn, B.-G. Park, B. Naser, J.-F. Lin, J.P. Bird, D.K. Ferry, "Single-electron tunneling in silicon-on-insulator nano-wire transistors," Superlattices and Microstructures, Vol. 34, pp. 245-251, September-December 2003. [SCI] [DOWNLOAD]
  11. Dong-Soo Woo, Byung Yong Choi, Woo Young Choi, Myeong Won Lee, Jong Duk Lee, and Byung-Gook Park, "30 nm self-aligned FinFET with large source/drain fan-out structure," IEE Electronics Letters, Vol. 39, No. 15, pp. 1154-1155, July 2003.[SCI]  [DOWNLOAD]
  12. B. Naser, K.H. Cho, S.W. Hwang, J.P. Bird, D.K. Ferry, S.M. Goodnick, B.G. Park, D. Ahn, "Transport study of ultra-thin SOI MOSFETs," Physica E, Vol. 19, pp. 39-43, July 2003. [SCI]  [DOWNLOAD]
  13. Kyung-Hoon Chung, Woo Young Choi, Suk-Kang Sung, Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Pattern multiplication method and the uniformity of nanoscale multiple lines," J. Vac. Sci. Technol. B. Vol. 21, Issues 4, pp. 1491-1495, July 2003. [SCI]  [DOWNLOAD]
  14. Euo Sik Cho, Sang Jik Kwon, Hwi Chan Yang, Hyung Soo Uh, Yeo Hwan Kim, Byung-Gook Park and Jong Duk Lee, "Fabrication and characterization of phosphorus-implanted mold-type diamond field-emitter arrays," Thin Solid Films, Vol. 435, Issues 1-2, pp. 324~328, July 2003.[SCI]  [DOWNLOAD]
  15. Jaeyoung Oh, Jinsoo Joo, Chun An Lee, Byung Gook Park and Donghwan Kim, "The Influence of Surface-modified ITO by Ion Beam Irradation on the Organic EL Performances," Korean Journal of Materials Research, Vol. 13, No. 3, pp. 191~194, March 2003.   [DOWNLOAD]
  16. Il Hwan Cho, Byung Gook Park, Jong Duk Lee and Jong Ho Lee, "Nano-Scale SONOS Memory with a Double-Gate MOSFET Structure," Journal of the Korean Physical Society, Vol. 42, No. 2, pp. 233~236, Feb. 2003.[SCI]  [DOWNLOAD]
  17. Euo Sik Cho, Byung-Gook Park, and Jong Duk Lee, Sang Jik Kwon, "Field emission properties of phosphorus doped microwave plasma chemical vapor deposition diamond films by ion implantation," J. Vac. Sci. Technol. B. Vol. 21, Issues 1, pp. 603-607, January/February 2003. [SCI]  [DOWNLOAD]
  18. Il Hwan Kim, Jong Duk Lee, Chang Woo Oh, Jae Woo Park, and Byung Gook Park, "Metal-oxide-semiconductor field effect transistor-controlled field emission display," J. Vac. Sci. Technol. B. Vol. 21, Issues 1, pp. 519-522, January/February 2003. [SCI]  [DOWNLOAD]
  19. Jong Duk Lee, Chang Woo Oh, and Byung Gook Park, "Electrical aging of molybdenum field emitters," J. Vac. Sci. Technol. B. Vol. 21, Issues 1, pp. 440-444, January/February 2003. [SCI]  [DOWNLOAD]

2 0 0 2

 

  1. Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook Park, "Single-Electron Transistors Based on Gate-Induced Si Island for Single-Electron Logic Application," IEEE Transactions on Nanotechnology, Vol. 1, No. 4, pp. 170-175, Dec. 2002. [SCIE]  [DOWNLOAD]
  2. Sang-Hoon Lee, Dae Hwan Kim, Kyung Rok Kim, Jong Duk Lee, Byung-Gook Park, Young-Jin Gu, Gi-Young Yang, and Jeong-Taek Kong, "A Practical SPICE Model Based on the Physics and Characteristics of Realistic Single-Electron Transistors," IEEE Transactions on Nanotechnology, Vol. 1, No. 4, pp. 226-232, Dec. 2002. [SCIE] [DOWNLOAD]
  3. Dong-Soo Woo, Jong-Ho Lee, Woo Young Choi, Byung-Yong Choi, Young-Jin Choi, Jong Duk Lee, and Byung-Gook Park, "Electrical Characteristics of FinFET With Vertically Nonuniform Source/Drain Doping Profile," IEEE Transactions on Nanotechnology, Vol. 1, No. 4, pp. 233-237, Dec. 2002. [SCIE] [DOWNLOAD]
  4. Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook Park, "Fabrication of single-electron tunneling transistors with an electrically formed Coulomb island in a silicon-on-insulator nanowire," Virtual Journal of Nanoscale Science & Technology, Volume 6, Issue 25, (JVSTb Vol. 20, pp. 1410-1418), Dec. 2002. [SCI]  [DOWNLOAD]
  5. Yong Kyu Lee, Suk Kang Sung, Jae Seong Sim, Chang Ju Lee, Tae Hun Kim, Jong Duk Lee, Byung Gook Park, Dong Hun Lee and Young Wug Kim, "Multi-Level Vertical-Channel SONOS Nonvolatile Memory Using a Standard SOI Logic Process," Journal of the Korean Physical Society, Vol. 41, No. 6, pp. 908~911, Dec. 2002. [SCI]  [DOWNLOAD]
  6. Yong Kyu Lee, Jae Sung Sim, Suk Kang Sung, Chang Ju Lee, Tae Hun Kim, Jong Duk Lee, Byung Gook Park, Dong Hun Lee, and Young Wug Kim, "Multilevel Vertical-Channel SONOS Nonvolatile Memory on SOI," IEEE Electron Device Letters, Vol. 23, No. 11, pp. 664-666, Nov. 2002. [SCI]  [DOWNLOAD]
  7. Cheon An Lee, Dong Soo Woo, Hyuck In Kwon, Yong Jin Yoon, Jong Duk Lee, and Byung-Gook Park, "Design of a CMOS On-chip Driver Circuit for Active Matrix Polymer Electroluminescent Displays," Journal of Information Display, Vol. 3, NO. 2, pp 1-5, June, 2002. [DOWNLOAD]
  8. Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, Byung-Gook Park, Bum Ho Choi, Sung Woo Hwang and Doyeol Ahn, "Single-Electron Transistors with Sidewall Depletion Gates on an SOI Nanowire and Their Application to Single-Electron Inverters," Journal of The Korean Physical Society, Vol. 41, No. 4, pp. 505-508, Oct. 2002. [SCI]  [DOWNLOAD]
  9. Woo Young Choi, Byung Yong Choi, Young Jin Choi, Dong-Soo Woo, Suk-Kang Sung, Jong Duk Lee and Byung-Gook Park, "Fabrication of a 30-nm Planar nMOSFETs Based on the Sidewall Patterning Technique," Journal of The Korean Physical Society, Vol. 41, No. 4, pp. 497-500, Oct. 2002. [SCI]  [DOWNLOAD]
  10. Young Jin Choi, Byung Yong Choi, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook Park, "A New 50-nm nMOSFET With Side-Gates for Virtual Source-Drain Extensions," IEEE Transactions on Electron Devices, Vol. 49, No. 10, pp. 1833-1835, Oct. 2002. [SCI]  [DOWNLOAD]
  11. Kyung Rok Kim, Dae Hwan Kim, Suk-Kang Sung, Jong Duk Lee, and Byung-Gook Park, "Negative-Differential Transconductance Characteristics at Room Temperature in 30-nm Square-Channel SOI nMOSFETs With a Degenerately Doped Body," IEEE Electron Device Letters, Vol. 23, No. 10, pp. 612-614, Oct. 2002. [SCI]  [DOWNLOAD]
  12. Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook Park, "Fabrication of single-electron tunneling transistors with an electrically formed Coulomb island in a silicon-on-insulator nanowire," J. Vac. Sci. Technol. B. Vol. 20, Issues 4, pp. 1410-1418, July/August 2002. [SCI]  [DOWNLOAD]
  13. B.H. Choi, S.H. Son, K.H. Cho, S.W. Hwang, D. Ahn, D.H. Kim, J.D. Lee, B.G. Park, "Direct observation of excited states in double quantum dot silicon single electron transistor," Microelectronic Engineering. Vol. 63, Issues 1-3, pp. 129-133, July 2002. [SCI]  [DOWNLOAD]
  14. Kyung-Hoon Chung, Suk-Kang Sung, Dae Hwan Kim, Woo Young Choi, Cheon An Lee, Jong Duk Lee and Byung-Gook Park, "Nanoscale Multi-Line Patterning Using Sidewall Structure," Jpn. J. Appl. Phys. Vol. 41, pp. 4410-4414, Part 1, No. 6B, June 2002. [SCI]  [DOWNLOAD]
  15. B. H. Choi, Y. S. Yu, D. H. Kim, S. H. Son, K. H. Cho, S. W. Hwang, D. Ahn, and B. G. Park, "Double-dot-like charge transport through a small size silicon single electron transistor," Physica E, Vol. 13, pp. 946-949, March 2002. [SCI]  [DOWNLOAD]
  16. Dae Hwan Kim, Kyung Rok Kim, Suk Kang Sung, Jong Duk Lee, and Byung-Gook Park, "Dynamic exclusive-OR gate based on gate-induced Si island single electron transistor," IEE Electronics Letters, Vol. 38, No. 11, pp. 527~529, May 2002.[SCI]  [DOWNLOAD]
  17. B. Y. Choi, W. Y. Choi, J. D. Lee, B.-G. Park, "50nm MOSFETs with side-gates for induced source/drain extension," IEE Electronics Letters, Vol. 38, No. 11, pp. 526~527, May 2002.[SCI]  [DOWNLOAD]
  18. Jong Duk Lee, Jung Hyun Nam, Hyuck In Kwon and Byung-Gook Park, "Design and Fabrication of the Driving Circuits for One-Chip FED on the Standard CMOS Process," Journal of the Korean Physical Society, Vol. 40, No. 4, pp. 592~594, April 2002.[SCI]  [DOWNLOAD]
  19. Suk-Kang Sung, Dae Hwan Kim, Jae-Sung Sim, Kyung Rok Kim, Yong Kyu Lee, Jong Duk Lee, Soo Doo Chae, Byung Man Kim, and Byung-Gook Park, "Single-Electron MOS Memory with a Defined Quantum Dot Based on Conventional VLSI Technology," Jpn. J. Appl. Phys. Vol. 41, Part 1, No. 4B, pp. 2606-2610, Apr. 2002.[SCI]  [DOWNLOAD]
  20. Kyung Rok Kim, Dae Hwan Kim, Suk-Kang Sung, Jong Duk Lee, Byung-Gook Park, Bum Ho Choi, Sung Woo Hwang, and Doyeol Ahn, "Single-Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Nano-Wire," Jpn. J. Appl. Phys. Vol. 41, Part 1, No. 4B, pp. 2574-2577, Apr. 2002.[SCI]  [DOWNLOAD]
  21. Woo Young Choi, Byung Yong Choi, Dong Soo Woo, Young Jin Choi, Jong Duk Lee, and Byung-Gook Park, "Side-Gate Design Optimization of 50 nm MOSFETs with Electrically Induced Source/Drain," Jpn. J. Appl. Phys. Vol. 41, Part 1, No. 4B, pp. 2345-2347, Apr. 2002.[SCI]  [DOWNLOAD]
  22. Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, Byung-Gook Park, Bum Ho Choi, Sung Woo Hwang, Doyeol Ahn, "Silicon single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic," IEEE Transactions on Electron Devices, Vol. 49, NO. 4, pp. 627-635, Apr. 2002. [SCI]  [DOWNLOAD]
  23. Hyung Soo Uh, Sang Sik Park, and Jong Duk Lee, "Low turn-on voltage Mo-polycide field emitter arrays applied to field emission flat panel display," Journal of Vac. Sci. Tech. B, Vol. 20, No. 1, pp. 203-208, Jan/Feb 2002. [SCI]  [DOWNLOAD]
  24. Dong-Soo Woo, Boo Sik Park, Jong Duk Lee, and Byung-Gook Park, "Fabrication of a 0.2um Ultra-Thin SOI Inverted Sidewall Recessed Channel with Single-Type Polysilicon Gate," Journal of the Korean Physical Society, Vol. 40, No. 1, pp. 68~71, Jan. 2002.[SCI]  [DOWNLOAD]
  25. Jong Duk Lee, Yong Jin Yoon, Cheol Shin Kwak, and Byung-Gook Park, "Synchronous Mirror Delay for Zero- and Multi-Phase Locking," Journal of the Korean Physical Society, Vol. 40, No. 1, pp. 87~89, Jan. 2002.[SCI]  [DOWNLOAD]
  26. Suk-Kang Sung, Jae-Sung Sim, Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Nanoscale-Wire Patterning Using Side-Wall and Quantum Dot Memory Device Fabrication," Journal of the Korean Physical Society, Vol. 40, No. 1, pp. 128~131, Jan. 2002.[SCI]  [DOWNLOAD]
  27. Kyung Rok Kim, Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Characteristics of Silicon-On-Insulator Single-Electron Transistors with Electrically Induced Tunnel Barriers," Journal of the Korean Physical Society, Vol. 40, No. 1, pp. 140~144, Jan. 2002.[SCI]  [DOWNLOAD]

2 0 0 1

 

  1. D. H. Kim, S.-K. Sung, J. S. Sim, K. R. Kim, J. D. Lee, B.-G. Park, B. H. Choi, S. W. Hwang, and D. Ahn, "Single-electron transistor based on silicon-on-insulator quantum wire fabricated by a side-wall patterning method," Appl. Phys. Lett., Vol. 79, No. 23, pp. 3812~3814, Dec. 2001.[SCI]  [DOWNLOAD]
  2. In-Ho Nam, Jae Sung Sim, Sung In Hong, Byung-Gook Park, Jong Duk Lee, Seung-Woo Lee, Man-Sug Kang, Young-Wug Kim, Kwang-Pyuk Suh, Won Seong Lee, "Ultrathin gate oxide grown on nitrogen-implanted silicon for deep submicron CMOS transistors," IEEE Transactions on Electron Devices, Vol. 48, NO. 10, pp. 2310-2316, Oct. 2001.[SCI]  [DOWNLOAD]
  3. Jong Duk Lee, Chang Woo Oh, Il Hwan Kim, Jae Woo Park and Byung Gook Park , Emission Characteristics of 0.7" Monochrome MOSFET-Controlled Field Emission Displays(MCFEDs)in High Vacuum Chamber, Journal of Information Display, Vol. 2, NO. 3, pp 66-71, September, 2001. [DOWNLOAD]
  4. Byung Yong Choi, In-Ho Nam, Jong Duk Lee and Byung-Gook Park, "Sub-0.1-um NMOSFET with 12-nm n+-p Junction Using 5-keV As2+ Ion Implantation," Journal of The Korean Physical Society, Vol.39, No.1, pp. 72-75, July 2001.[SCI]  [DOWNLOAD]
  5. Jong Duk Lee, Euo Sik Cho and Sang Jik Kwon, "Fabrication of triode diamond field emitter arrays on glass substrate by anisotropic conductive film bonding," J. Vac. S.cTechnol. B 19 Vol3 , pp. 954-957, May/June 2001.[SCI]  [DOWNLOAD]
  6. Jong Duk Lee, Sung Hun Jin, Byung Chang Shim, Byung-Gook Park, "A Formation of Co Silicide on Silicon Field Emitter Arrays by Electrical Stress", IEEE Electron Device Letters, Vol. 22, No. 4, pp. 173-175, April 2001.[SCI]  [DOWNLOAD]
  7. Byung Yong Choi, Suk Kang Sung, Byung-Gook Park, and Jong Duk Lee 70nm NMOSFET Fabrication with 12nm n+-p Junctions Using As2+ Low Energy Implantation, Jpn. J. Appl. Phys., Vol. 40, pp. 2607~2610, April 2001.[SCI]  [DOWNLOAD]
  8. Jong Duk Lee, Yong Jin Yoon, Kyoung Hwa Lee and Byung-Gook Park, Application of Dynamic Pass-Transistor Logic to an 8-Bit Multiplier," Journal of The Korean Physical Society, Vol.38, No.3, pp. 220-223, March 2001.[SCI]  [DOWNLOAD]
  9. Jong Duk Lee, Byung Chang Shim and Byung Gook Park, Co Silicide Field Emitter Arrays Formed from Ti/Co Layers, Journal of The Korean Physical Society, Vol.38, No.3, pp210-214, March 2001.[SCI][DOWNLOAD]
  10. Jong Duk Lee, Sung Hun Jin, Byung Chang Shim and Byung Gook Park, Co Silicide Formation on Single Crystal Silicon Field Emitter Arrays by Using Electrical Stress," Journal of The Korean Physical Society, Vol.38, No.3, pp. 203-206, March 2001.[SCI][DOWNLOAD]
  11. Byung Yong Choi, Suk Kang Sung, Jong Duk Lee, and Byung -Gook Park, "70nm NMOSFET Fabrication with Ultra-shallow n+-p Junctions Using Low Energy As2+ Implantayions," Journal of The Institute of Electronics Engineerings of Korea , Volume 38-SD, Number. 2, pp. 9-17, February 2001.[DOWNLOAD]
  12. Inho Nam, Sung In Hong, Jae Sung Sim, Byung-Gook Park, and Jong Duk Lee, Seung Woo Lee, Man-Suk Kang, Young- Kim, Kwang-Pyuk Suh, and Won-Seong Lee, "Nitrogen profile effects on the growth rate of oxides grown on nitrogen-implanted silicon", Journal of Vacuum Science and Technology B, Vol. 19, No. 1, pp. 299-304, Jan/Feb. 2001[SCI]  [DOWNLOAD]
  13. Jong Duk Lee, Byung Chang Shim, Byung-Gook Park, "Silicide Application on Gated-Crystal, Polycrystalline and Amorphous silicon FEAs - Part II: Co Silicide", IEEE Transactions on Electron Devices, Vol. 48, NO. 1, January, 2001.[SCI]  [DOWNLOAD]
  14. Jong Duk Lee, Byung Chang Shim, Byung-Gook Park, "Silicide Application on Gated-Crystal, Polycrystalline and Amorphous silicon FEAs - Part I: Mo Silicide", IEEE Transactions on Electron Devices, Vol. 48, NO. 1, January, 2001.[SCI]  [DOWNLOAD]

2 0 0 0

 

  1. Jong Duk Lee, Byung Chang Shim, Byung Gook Park, and Sang Jik Kwon, "Molybdenum and Cobalt Silicide Field Emitter Arrays," Journal of Information Display, Vol. 1, NO. 1, pp. 63-69, December, 2000.  [DOWNLOAD]
  2. Yeong Taek Lee, Dong Soo Woo, Jong Duk Lee, and Byung Gook Park, "Threshold Voltage Reduction Model for Buried Channel PMOSMETs Using Quasi-2-D Poisson Equation," IEEE Transactions on Electron Devices, Vol. 47, NO. 12, pp 2326-2333,December, 2000.[SCI]  [DOWNLOAD]
  3. Sang Jik Kwon, Kun Cho Hong, Jung Ho Sung, Chang Ho Lee, Ki Woong Whang, Cha Keun Yoon, Jong Duk Lee, Seong Hyeon Hong, Sun Woo Park, Yong Bum Kwon," Operational PDP Fabrication Using a Fully Vacuum In-Line Sealing Technology, Jounal of the Korean Physical Society, Vol. 37, No. 3, pp. 247-252, September, 2000.[SCI]  [DOWNLOAD]
  4. S.H.Cho, S.H.Kwon, J.S.Yoo, C.W.Oh, J.D.Oh, J.D.Lee, K.J.Hong, S.J.Kwon, "Cathodluminescent Characteristics of a Spherical Y2O3 : Eu Phosphor Screen for Field Emission Display Application, Jounal of the Electrochemical Society, Vol. 147, No. 8, pp. 3143-3147, August, 2000.[SCI]  [DOWNLOAD]
  5. S.H. Kwon, H. Cho, J.S. Yoo, J.D.Lee, "Fabrication of Full-color Phosphor Screen by Electrophoretic Deposition for Field Emission Display Application," Jounal of the Electrochemical Society, Vol. 147, No. 8, pp. 3120-3124, August, 2000.[SCI]  [DOWNLOAD]
  6. Sang Jik Kwon, Kun Jo Hong, Jong Duk Lee, Chang Woo Oh, Jae Soo Yoo, Yong Bum Kwon, "Influence of getter activation and aging in a frit-sealed field emission display panel," Journal`of Vacuum Science Technology B, pp. 1227~1231 , May/June , 2000.[SCI]  [DOWNLOAD]
  7. Sangyeon Han, Suna Yang, Taekeun Hwang, Jongho Lee, Jong Duk Lee and Hyungcheol Shin,"Lateral Silicon Field Emission Devices using Electron Beam Lithography," Jpn. J. Appl. Phys., Vol. 39, pp. 2556~2559, May, 2000.[SCI]  [DOWNLOAD]
  8. Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Room Temperature Coulomb Oscillation of a Single Electron Switch with an Ectrically Formed Quantum Dot and Its Modeling," Jpn. J. Appl. Phys., Vol. 39, pp. 2329~2333, April, 2000.[SCI]  [DOWNLOAD]
  9. Tae-Sik Yoon, Jang-Yeon Kwon, Dong-Hoon Lee, Ki-Bum Kim, Seok-Hong Min, Dong-Hyuk-Chae, Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "High spatial density nanocrystal formation using thin layer of amorphous Si0.7Ge0.3 deposited on SiO2,"J. of Applied Physics, Vol. 87, No. 5, pp2449~2453, March, 2000.[SCI]  [DOWNLOAD]
  10. In-Ho Nam, Sung-In Hong, Jae Sung Sim, Byung-Gook Park, Jong Duk Lee, "Annealing Effects on QBD of Ultra-Thin Gate Oxide Grown on Nitrogen Implanted Silicon," J. of KITE, Vol.37-SD, pp.6-13, March, 2000  [DOWNLOAD]

 

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