Jong Duk Lee was born in Youngchun, Kyungpook, Korea. He received the B.S. degree in physics from Seoul National University in 1966. He received the Ph.D. degree from the Department of Physics at the University of North Carolina at Chapel Hill in 1975. He served at the Military Communication School as a ROTC officer from 1966 to 1968. He then worked at the Engineering College of Seoul National University as a teaching assistant in the Department of Applied Physics until 1970. He was an Assistant Professor in the Department of Electronics Engineering at Kyungpook National University from 1975 to 1978. In 1978, he studied microelectric technology in HP-ICL at Palo Alto, CA, USA, and soon afterward worked for the Korea Institute of Electronic Technology (KIET) as the director of the semiconductor division. He established the KIET Kumi Facility and introduced the first polysilicon gate technology in Korea by developing 4K SRAM, 32K and 64K Mask ROM's, and one-chip 8-bit microcomputer.
  In July 1983, he moved to the Department of Electronics Engineering of Seoul National University, which has been merged to School of Electrical Engineering in 1992, where he is now a Professor. He started to establish the Inter-University Semiconductor Research Center (ISRC) in 1985, and served as the director from 1987 to 1989. He served as the chairman of the Electronics Engineering Department from 1994 to 1996. He worked for Samsung SDI Co., Ltd. as the Head of Display R&D Center for a year on the leave of SNU in 1996. He was the member of the steering committee for IVMC(International Vacuum Microelectronics Conference) from 1997-2001 and KCS(Korean Conference on Semiconductors) from 1998-2008. He was the conference chairman of IVMC´97 and KCS´98 who led the IVMC´97 and the KCS´98 successfully. He was also the member of IEDM(International Electron Devices Meeting) Subcommittee on Detectors, Sensors and Displays operated by IEEE Electron Devices Society from 1998 to 1999, he has been elected to the first president of the Korean Information Display Society in June 1999 to serve until Dec.31,2001. He initiated IMID (International Meeting on Information Display) for KIDS activity and served as the first organization chairman in 2001. He concentrated his study on the image sensors such as Vidicon type,MOS type, and also CCD to help Samsung SDI Co. and Samsung Electronics Co. since 1985. His current research interests include sub 0.1 um CMOS structure and technology, CMOS image sensors and FED(Field Emission Display), and organic TFTs. He published more than 274 papers in the journals such as IEEE-ED and EDL, Journal of Vacuum Science and Technology, Applied Physics and Journal of Electrochemical Society, including 200 SCI journal papers. He presented more than 518 papers including 309 international conference papers. He also registered 13 US, 4 Japanese, and 39 Korean patents. Now he is a member of KPS (Korean Physical Society), KVS (Korea Vacuum Society) , IEEK (Institute of Electronic Enginners in Korea), and KIDS (Korean Information Display Society). He is also a life time member of CAST(Korean Academy of Science and Technology). He was a member of IEEE(M'78), SID, AVS and ECS. In 2008, he received the Honorary Doctorate of Science from UKM (University Kebangsaan Malaysia).

 

   Journal

 

  1. Hee-Sauk Jhon, Hakchul Jung, Jongwook Jeon, Minsuk Koo, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, “SIZE EFFICIENT LOW-NOISE AMPLIFIER FOR 2.4 GHz ISM-BAND TRANSCEIVER,” Microwave and Optical Technology Letters, vol. 51, No. 10, pp. 2304 - 2308, Oct. 2009 [SCI][DOWNLOAD]
  2. Jong Pil Kim, Jae Young Song, Sang Wan Kim, Jae Hyun Park, Woo Young Choi, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park,“Self-Aligned Asymmetric Metal–Oxide–Semiconductor Field Effect Transistors Fabricated on Silicon-on-Insulator,”Japanese Journal of Applied Physics, Vol. 48, No. 9, pp. 091201, Sep. 24, 2009 [SCI][DOWNLOAD]
  3. Seongjae Cho, Il Han Park, Yoon Kim, Se Hwan Park, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park,“A Gated Twin-Bit (GTB) Nonvolatile Memory Device and Its Fabrication Method,” IEEE Trans. Nanotechnol., Vol. 8, No. 5, pp. 595-602, Sep. 2009 [SCI][DOWNLOAD]
  4. Jang-Gn Yun, Il Han Park, Wandong Kim, Jong Duk Lee, and Byung-Gook Park,“Extended Word-Line NAND Flash Memory,” Jpn. J. Appl. Phys., vol. 48, p. 081203, 2009 [SCI][DOWNLOAD]
  5. Jang-Gn Yun, Yoon Kim, Il Han Park, Jung Hoon Lee, Daewoong Kang, Myoungrack Lee, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park,“Independent Double-Gate Fin SONOS Flash Memory Fabricated With Sidewall Spacer Patterning,” IEEE Trans. Electron Dev., Vol.56, No. 8, pp. 1721-1728, Aug. 2009 [SCI][DOWNLOAD]
  6. Daewoong Kang, Seungwon Yang, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, “Extraction of trap depth in flash cell having arch-active structure,” Applied Physics Express, vol. 2, No. 7, pp. 71202, July. 2009 [SCI][DOWNLOAD]
  7. Dong Seup Lee, Sangwoo Kang, Kwon-Chil Kang, Joung-Eob Lee, Jung Hoon Lee, Kwan-Jae Song, Dong Myong Kim, Jong Duk Lee, and Byung-Gook Park,“Fabrication and Characteristics of Self-Aligned Dual-Gate Single-Electron Transistors,” IEEE Trans. Nanotechology, Vol.8, No. 4, pp. 492-497, July 2009 [SCI][DOWNLOAD]
  8. Jang-Gn Yun, Jong Duk Lee and Byung-Gook Park, “Various Flash Memory Devices of Novel Design,” IETE Technical Review, Volume 26, Issue 4, pp. 247-257, JUL-AUG 2009 [SCIE][DOWNLOAD]
  9. Jaehong Lee, Junsoo Kim, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, “Application of area-saving RF test structure on mobility extraction,” Journal of Semiconductor Technology and Science, Vol.9, No.2, pp. 98-103, June 2009 [DOWNLOAD]
  10. Younghwan Son, Seungwon Yang, Bong Chan Kim, Jinho Kim, Chang-Rok Moon, Duckhyung Lee, Jong-Duk Lee, Byung-Gook Park, and Hyungcheol Shin, “Extraction of Interface-States Energy Distribution in Nitrided and Pure Gate Dielectrics for Metal Oxide Semiconductor Field Effect Transistor Applications,” Japanese Journal of Applied Physics, Volume 48, No. 5, pp. 054502, May 2009 [SCI][DOWNLOAD]
  11. Doo-Hyun Kim, Il Han Park, Seongjae Cho, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, “Simulation of Retention Characteristics in Double-Gate Structure Multi-Bit SONOS Flash Memory,” IEICE Transactions on Electronics, Vol. E92-C, No. 5, pp. 659-663, May 2009 [SCIE][DOWNLOAD]
  12. Yoon Kim, Seongjae Cho, Gil Sung Lee, Il Han Park, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, “3-Dimensional Terraced NAND (3D TNAND) Flash Memory-Stacked Version of Folded NAND Array,” IEICE Transactions on Electronics, Vol. E92-C, No. 5, pp. 653-658, May 2009 [SCIE][DOWNLOAD]
  13. Sang Hyuk Park, Sangwoo Kang, Seongjae Cho, Dong-Seup Lee, Jung Han Lee, Hong-Seon Yang Kwon-Chil Kang, Joung-Eob Lee, Jong Duk Lee, and Byung-Gook Park, “Recessed Channel Dual Gate Single Electron Transistors (RCDG-SETs) for Room Temperature Operation,” IEICE Transactions on Electronics, Vol. E92-C, No. 5, pp. 647-652, May 2009 [SCIE][DOWNLOAD]
  14. Jongwook Jeon, Ickhyun Song, Jong Duk Lee, Byung-Gook Park, and Hyungcheol Shin“Application of the Compact Channel Thermal Noise Model of Short Channel MOSFETs to CMOS RFIC Design,” IEICE Transactions on Electronics, Vol. E92-C, No. 5, pp. 627-634, May 2009 [SCIE][DOWNLOAD]
  15. Seongjae Cho, Jung Hoon Lee, Gil Sung Lee, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, “Design Consideration for Vertical Nonvolatile Memory Device Regarding Gate-Induced Barrier Lowering (GIBL),” IEICE Transactions on Electronics, Vol. E92-C, No. 5, pp. 620-626, May 2009 [SCIE][DOWNLOAD]
  16. Daewoong Kang, Jinho Kim, Duckhyung Lee, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, “Extraction of vertical, lateral locations and energies of hot-electrons-induced traps through the random telegraph noise,” Japanese Journal of Applied Physics: Special Issues - Solid State Devices and Materials, April 2009 [SCI][DOWNLOAD]
  17. Minsuk Koo, Hakchul Jung, Hee-Sauk Jhon, Byung-Gook Park, Jong Duk Lee, and , Hyungcheol Shin, “Investigation of frequency dependent sensitivity of noise figure on device parameters in 65 nm CMOS,” Journal of Semiconductor Technolegy and Science, March 2009 [DOWNLOAD]
  18. Junsoo Kim, Jaehong Lee, Youngmin Kwon, , Byung-Gook Park, Jong Duk Lee, and , Hyungcheol Shin, “Extraction of ballistic parameters in 65 nm MOSFETs,” Journal of Semiconductor Technolegy and Science, March 2009, March 2009 [DOWNLOAD]
  19. Keum-Dong Jung, Yoo Chul Kim, Byung-Gook Park, Hyungcheol Shin, Jong Duk Lee, “Modeling and Parameter Extraction for the Series Resistance in Thin-Film Transistors,” IEEE Transactions on Electron Devices, Vol. 56, No. 3, pp. 431-440, March 2009 [SCI][DOWNLOAD]
  20. Hee-Sauk Jhon, Ickhyun Song, Jongwook Jeon, Minsuk Koo, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, “Low Power Size-Efficient CMOS UWB Low-Noise Amplifier Design,” Microwave and Optical Technology Letters, vol. 51, no.2, pp. 494-496, Feb. 2009. [SCI][DOWNLOAD]
  21. Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Jong Duk Lee, and Byung-Gook Park, "A 2-Bit Recessed Channel Nonvolatile Memory Device With a Lifted Charge-Trapping Node," IEEE Trans. Nanotechnol., vol. 8, pp. 111-115, 2009 [SCI][DOWNLOAD]
  22. Ickhyun Song, Jongwook Jeon,Hee-Sauk Jhon, Junsoo Kim, Byung-Gook Park, Jong Duk Lee, HyungcheolShin, “A Simple Figure of Merit of RF MOSFET for Low-Noise Amplifier Design,” Electron Device Letters, vol. 29, no.12, pp. 1380-1382, Dec. 2008 .[SCI] [DOWNLOAD]
  23. Seongjae Cho, Il Han Park, JungHoon Lee, Younghwan Son, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Dependence of Program Efficiency on Channel Conditions Regarding NOR-Type Flash Memory Devices Fabricated on a Silicon-on-Insulator (SOI) Substrate,"Journal of the Korean Physical Society, vol. 53, No. 6, pp. 3422-3426, December 2008.[SCI] [DOWNLOAD]
  24. Hee-Sauk Jhon, Ickhyun Song,Jongwook Jeon, Hakchul Jung, Minsuk Koo, Byung-Gook Park, Jong Duk Lee and Hyungcheol Shin, “8mW 17/24 GHz dual-band CMOS low-noise amplifier for ISM-band application,” IEE Electronics Letters, vol.44, no.23, pp. 1353-1354, Nov. 2008. [SCI] [DOWNLOAD]
  25. Junsoo Kim, Jaehong Lee, IckhyunSong, Yoenam Yun, Jong Duk Lee, Byung-Gook Park, and Hyungcheol Shin, “Accurate extraction of effective channel length and source/drain series resistance in ultra short-channel MOSFETs by iteration method, IEEE Transaction on Electron Devices, Vol. 55, No.10, pp.2779-2784, October 2008.[SCI] [DOWNLOAD]
  26. Jang-Gn Yun, Yoon Kim, Il HanPark, Jung Hoon Lee, Sangwoo Kang, Dong-Hua Lee, Seongjae Cho, Doo-Hyun Kim, Gil Sung Lee, Won-Bo Sim, Younghwan Son, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "Fabrication and characterization of fin SONOS flash memory with separated double-gate structure," Solid-State Electron., vol. 52, pp. 1498-1504, October 2008.[SCI] [DOWNLOAD]
  27. Jong Duk Lee, Byung-Gook Park,and Keum-Dong Jung, "Reliability Issues of Bottom-Contact Pentacene Thin-Film Transistors," Saians Malaysiana, vol. 37, no. 3, pp.295-298, September 2008.  [DOWNLOAD]
  28. Seung-Hwan Seo, Se-Woon Kim,Jang-Uk Lee, Gu-Cheol Kang, Kang-Seob Roh, Kwan-Young Kim, Soon-Young Lee, Chang-Min Choi, Kwan-Jae Song, So-Ra Park, Jun-Hyun Park, Ki-Chan Jeon, Dong Myong Kim, Dae Hwan Kim, Hyungcheol Shin, Jong Duk Lee and Byung-Gook Park, "Channel width dependence of hot electron injection program/hot hole erase cycling behavior in silicon-oxide-nitride-oxide-silicon (SONOS) memories," Solid-State Electronics, vol. 52, iss. 6, pp. 844-848, Jun. 2008.[SCI] [DOWNLOAD]
  29. Seongjae CHO, Il Han PARK, JungHoon LEE, Jong Duk LEE, and Byung-Gook PARK, "Evaluation andResolution for Nonideal Characteristics of Complementary Metal-Oxide-Semiconductor Devices Fabricated on Silicon-on-Insulator," Japanese Journal of Applied Physics, Vol. 47 No. 6 pp. 4408-4412, June 2008.[SCI] [DOWNLOAD]
  30. 김준수, 이재홍, 윤여남, 박병국, 이종덕, 신형철, "Extraction of effective carrier velocity and observation of velocity overshoot in sub-40 nm MOSFETs", Journal of Semiconductor Technology and Science, vol. 8 no. 2 pp.115-120, 2008. 6 [DOWNLOAD]
  31. Jang Gn YUN, Il Han PARK,Seongjae CHO, Jung Hoon LEE, Doo-Hyun KIM, Gil Sung LEE, Yoon KIM, JongDuk LEE, and Byung-Gook PARK, “Characterization of 2-bit Recessed Channel Memory with Lifted-Charge Trapping Node (L-CTN) Scheme,” IEICE Transactions on Electronics, Vol. E91-C, No. 5, pp. 742-746, May 2008 [SCIE] [DOWNLOAD]
  32. Seongjae Cho, Il Han Park, JungHoon Lee, Jang-Gn Yun, Doo-Hyun Kim, Jong Duk Lee, Hyungcheol Shin, andByung-Gook Park, “Establishing Read Operation Bias Schemes for 3-D Pillar Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI),” IEICE Transactions on Electronics, Vol. E91-C, No. 5, pp. 731-735, May 2008 [SCIE] [DOWNLOAD]
  33. Sangwoo Kang, Dae-Hwan Kim,Il-Han Park, Jin-Ho Kim, Joung-Eob Lee, Jong Duk Lee, and Byung-GookPark, "Self-aligned dual-gate single-electron transistors," Japanese Journal of Applied Physics, vol. 47, no. 4, pp. 3118-3122, Apr. 2008. [SCI] [DOWNLOAD]
  34. Dae Woong Kang, Sungnam Jang,Kyongjoo Lee, Jinjoo Kim, Dongwon Chang, Hyukje Kwon, Wonseong Lee, IlHan Park, Junsoo Kim, Lee Jaehong, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Improving the cell characteristics using SiN liner at active edge in 4 gbits NAND flash memories", Japanese Journal of Applied Physics Part 1-Regular Papers Short Notes & Rev, vol. 47 no. 4 pp.2676-2679, Apr. 2008 [SCI] [DOWNLOAD]
  35. Jun Jongwook, Yoon Yeonam,Junsoo Kim, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "On thecharacteristics and spatial dependence of channel thermal noise in nanoscale Metal–Oixde–Semiconductor field effect transistors", Japanese Journal of Applied Physics Part 2-Letters & Express Letters, vol. 47 no. 4 pp.2636-2640, Apr. 2008 [SCI] [DOWNLOAD]
  36. Keum-Dong Jung, Yoo Chul Kim,Byeong-Ju Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee,"An Analytic Current-Voltage Equation for Top-Contact Organic Thin Film Transistors Including the Effects of Variable Series Resistance," Japanese Journal of Applied Physics, Vol. 47, No. 4, pp. 3174-3178, April, 2008 [SCI]  [DOWNLOAD]
  37. Seung-Hwan Seo, Gu-Cheol Kang,Kang Seob Roh, Kwan Young Kim, Sunyeong Lee, Kwan-Jae Song, Chang MinChoi, So Ra Park, Kichan Jeon, Jun-Hyun Park, Byung-Gook Park, Jong Duk Lee, Dong Myong Kim, Dae Hwan Kim, "Dynamic bias temperature instability-like behaviors under Fowler-Nordheim program/erase stress in nanoscale silicon-oxide-nitride-oxide-silicon memories", Appl. Phys. Lett., Vol. 92, pp. 133508 April 2008. [SCI] [DOWNLOAD]
  38. Junsoo Kim, Lee Jaehong, SongIckhyun, Jong Duk Lee, Byung-Gook Park, Seungbum HONG, Hyoungsoo KO,Dong-Ki MIN, Hongsik PARK, Chulmin PARK, Juhwan JUNG, Hyungcheol Shin,"Characterization of sensitivity and resolution of silicon resistive probe", Japanese Journal of Applied Physics Part 2-Letters & Express Letters, vol. 47 no. 3 pp.1717-1722, Mar. 2008 [SCI] [DOWNLOAD]
  39. Jong Pil Kim, Woo Young Choi, Jae Young Song, Sang Wan Kim, Jong Duk Lee, and Byung-Gook Park, "Design and Fabrication of Asymmetric MOSFETs Using a Novel Self-Aligned Structure," IEEE Transactions on Electron Devices, Vol. 54, No. 11, pp. 2969-2974, November 2007. [SCI]  [DOWNLOAD]
  40. Woo Young Choi, Byung-Gook Park, Jong Duk Lee, and Tsu-Jae King Liu, "Tunneling Field Effect Transistor (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec", IEEE Electron Device Letters, Vol. 28, No. 8, pp. 743-745, August 2007. [SCI]  [DOWNLOAD]
  41. Jongwook Jeon, Jong Duk Lee, Byung-Gook Park, and Hyungcheol Shin, "An analytical channel thermal noise model for deep-submicron MOSFETs with short channel effects," Solid-State Electronics, Vol. 51, No. 7, pp. 1034-1038, July 2007. [SCI]  [DOWNLOAD]
  42. Jongwook Jeon, Jong Duk Lee, Byung-Gook Park, and Hyungcheol Shin, "Analytical noise parameter model of short-channel RF MOSFETs," Journal of Semiconductor Technology and Science, vol. 7, no. 2, pp.88-93, June 2007. [DOWNLOAD]
  43. Young Ho Jung, Hee Sauk Jhon, In Man Kang, Jong Duk Lee, Byung-Gook Park, and Hyungcheol Shin, "7 GHz and 25.8 GHz LC VCO using 0.18 um mixed signal CMOS process," ELEKTRIKA, vol. 9 no. 1 pp.48-51, June 2007. [DOWNLOAD]
  44. Hoon Jeong, Ki-Whan Song, Il Han Park, Tae-Hun Kim, Yeun Seung Lee, Seong-Goo Kim, Jun Seo, Kyoungyong Cho, Kangyoon Lee, Hyungcheol Shin, Jong Duk Lee, Byung-Gook Park, "A New Capacitorless 1T DRAM Cell: Surrounding Gate MOSFET with Vertical Channel (SGVC cell)", IEEE Transactions on Nanotechnology, Vol. 6, No. 3, pp. 352-357, May 2007. [SCI]  [DOWNLOAD]
  45. Jong Pil Kim, Woo Young Choi, Jae Young Song, Seongjae Cho, Sang Wan Kim, Jong Duk Lee, and Byung-Gook Park, “Design and Simulation of Asymmetric MOSFETs”, IEICE Trans. Electron., Vol. E90-C, pp. 978-982, May 2007. [SCIE]  [DOWNLOAD]
  46. In Man Kang, Jong Duk Lee, and Hyungcheol Shin, "Extraction of π-type substrate resistance based on three-port measurement and the model verification up to 110 GHz," IEEE Electron Device Letters, vol. 28, no. 5, pp.425-427, May 2007. [SCI]  [DOWNLOAD]
  47. Seongjae Cho, Jang-Gn Yun, Il Han Park, Jung Hun Lee, Jong Pil Kim, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, “Analyses on Current Characteristics of 3-D MOSFET Determined by Junction Doping Profiles for Nonvolatile Memory Devices,” IEICE Trans. Electron., Vol. E90-C, pp. 988-993, May 2007. [SCIE]  [DOWNLOAD]
  48. Hoon Jeong, Yeun Seung Lee, Sangwoo Kang, Il Han Park, Woo Young Choi, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "Capacitorless Dynamic Random Access Memory Cell with Highly Scalable Surrounding Gate Strcucture," Japanese Journal of Applied Physics, Vol. 46, No. 4B, pp. 2143-2147, April 2007. [SCI]  [DOWNLOAD]
  49. Dong-Wook Park, Cheon An Lee, Keum-Dong Jung, Byeong-Ju Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Electrically Stable Organic Thin-Film Transistors and Circuits Using Organic/Inorganic Double-Layer Insulator", Japanese Journal of Applied Physics, Vol. 46, No. 4B, pp. 2640-2644, April 2007. [SCI]  [DOWNLOAD]
  50. Cheon An Lee, Dong-Wook Park, Keum-Dong Jung, Jong Duk Lee, and Byung-Gook Park, "Full-Swing Pentacene Organic Inverter with Long-Channel Driver and Short-Channel Load", Japanese Journal of Applied Physics, Vol. 46, No. 4B, pp. 2661-2665, April 2007. [SCI]  [DOWNLOAD]
  51. Jae Young Song, Woo Young Choi, Jong Pil Kim, Sang Wan Kim, Jong Duk Lee, and Byung-Gook Park, "Novel Gate-All-Around Metal-Oxide-Semicondurctor Field Effect Transistors with Self-Aligned Structure", Japanese Journal of Applied Physics, Vol. 46, No. 4B, pp. 2046-2049, April 2007. [SCI]  [DOWNLOAD]
  52. Woo Young Choi, Jong Duk Lee, and Byung-Gook Park, "Novel Tunneling Devices with Multi-Functionality", Japanese Journal of Applied Physics, Vol. 46, No. 4B, pp. 2622-2625, April 2007. [SCI]  [DOWNLOAD]
  53. Y. S. Yu, D. H. Kim, J. D. Lee, B.-G. Park, S. W. Hwang, and D. Ahn, “Transport Spectroscopy of A Quantum Dot in a Silicon-on-Insulator (SOI) MOSFET,” Journal of Korean Physical Society, Vol. 50, No. 3, pp. 885-888, March 2007. [SCI]  [DOWNLOAD]
  54. Keum-Dong Jung, Cheon An Lee, Dong-Wook Park, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Admittance Measurements on OFET Channel and Its Modeling With R-C Network," IEEE Electron Device Letters, Vol. 28, No. 3, pp. 204-206, March 2007. [SCI]  [DOWNLOAD]
  55. Woo Young Choi, Jong Duk Lee, and Byung-Gook Park, "Integration Process of Impact-Ionization Metal-Oxide-Semiconductor Devices with Tunneling Field-Effect-Transistors and Metal-Oxide-Semiconductor Field-Effect Transistors," Japanese Journal of Applied Physics, Vol. 46, No. 1, Jan. 2007, pp. 122~124. [SCI]  [DOWNLOAD]
  56. Seung-Hwan Song, Kyung Rok Kim, Jin Ho Kim, Sangwoo Kang, Kwon Chil Kang, Jong Duk Lee, and Byung-Gook Park, "Negative Differential Transconductance Characteristics and Inter-Band Tunneling Mechanism of Fabricated FITETs," Journal of Korean Physical Society, Vol. 49, Dec. 2006, pp. S790~S794. [SCI]  [DOWNLOAD]
  57. Dong-Wook Park, Cheon An Lee, Keum-Dong Jung, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Low hysteresis pentacene thin-film transistors using SiO2/cross-linked poly(vinyl alcohol) gate dielectric," Appl. Phys. Lett., Vol. 89, pp. 263507-263509, Dec. 2006 [SCI]  [DOWNLOAD]
  58. Cheon An Lee, Dong-Wook Park, Keum-Dong Jung, Byung-ju Kim, Yoo Chul Kim, Jong Duk Lee, and Byung-Gook Park, "Hysteresis mechanism in pentacene thin-film transistors with poly(4-vinyl phenol) gate insulator," Appl. Phys. Lett., Vol. 89, pp. 262120-262122, Dec. 2006 [SCI]  [DOWNLOAD]
  59. Tae Hun Kim, Il Han Park, Jong Duk Lee, Hyung Cheol Shin, and Byung-Gook Park, "Electron trap density distribution of Si-rich silicon nitride extracted using the modified negative charge decay model of silicon-oxide-nitrideoxide-silicon structure at elevated temperatures," Appl. Phys. Lett., Vol. 89, Issue 6, p. 063508, Aug. 2006. [SCI]  [DOWNLOAD]
  60. Cheon An Lee, Sung Hun Jin, Keum Dong Jung, Jong Duk Lee, Byung-Gook Park, "Full-swing pentacene organic inverter with enhancement-mode driver and depletion-mode load," Solid-State Electronics, Vol. 50, Issues 7-8, pp. 1216-1218, July-August 2006. [SCI]  [DOWNLOAD]
  61. Woo Young Choi, Byung Yong Choi, Dong-Won Kim, Choong-Ho Lee, Donggun Park, Jong Duk Lee, and Byung-Gook Park, "25-nm Programmable Virtual Source/Drain MOSFETs Using a Twin SONOS Memory Structure," Solid-State Electronics, Vol. 50, Issue 6, pp. 914-919, June 2006. [SCI]  [DOWNLOAD]
  62. Cheon An Lee, Dong Wook Park, Sung Hun Jin, Il Han Park, Jong Duk Lee, and Byung-Gook Park, "Hysteresis mechanism and reduction method in the bottom-contact pentacene thin-film transistors with cross-linked poly(vinyl alcohol) gate insulator," Appl. Phys. Lett., Vol. 88, Issue 25, pp. 252102, June 2006. [SCI]  [DOWNLOAD]
  63. Il Hwan Cho, Tai-Su Park, Jeong Dong Choe, Hye Jin Cho, Donggun Park, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, and Jong-Ho Lee, "Fabrication and characteristics of P-channel silicon-oxide-nitride-oxidesilicon flash memory device based on bulk fin shaped field effect transistor structure," Journal of Vacuum Science and Technology B, Vol. 24, No. 3, pp. 1266-1270, May/June 2006.[SCI]  [DOWNLOAD]
  64. Il Han Park, Tae Hun Kim, Seongjae Cho, Jung Hoon Lee, Jong Duk Lee, and Byung-Gook Park, "Depletion-Enhanced Body-Isolation (DEBI) Array on SOI for Highly Scalable and Reliable NAND Flash Memories," IEEE Transactions on Nanotechnology, Vol. 5, No. 3, pp. 201-204, May 2006. [SCIE]  [DOWNLOAD]
  65. Seung-Hwan Song, Kyung Rok Kim, Sangwoo Kang, Jin Ho Kim, Jung Im Huh, Kwon Chil Kang, Ki-Whan Song, Jong Duk Lee, and Byung-Gook Park, "Analytical Modeling of Field-Induced Interband Tunneling-Effect Transistors and Its Application," IEEE Transactions on Nanotechnology, Vol. 5, No. 3, pp. 192-200, May 2006. [SCIE]  [DOWNLOAD]
  66. Jae Young Song, Woo Young Choi, Ju Hee Park, Jong Duk Lee, and Byung-Gook Park, "Design Optimization of Gate-All-Around (GAA) MOSFETs," IEEE Transactions on Nanotechnology, Vol. 5, No. 3, pp. 186-191, May 2006. [SCIE]  [DOWNLOAD]
  67. Seongjae Cho, Il Han Park, Tae Hun Kim, Jae Sung Sim, Ki-Whan Song, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Design and Optimization of Two-Bit Double-Gate Nonvolatile Memory Cell for Highly Reliable Operation," IEEE Transactions on Nanotechnology, Vol. 5, No. 3, pp. 180-185, May 2006. [SCIE]  [DOWNLOAD]
  68. Woo Young Choi, Jae Young Song, Jong Duk Lee, and Byung-Gook Park, "Effect of Source Extension Junction Depth and Substrate Doping Concentration on I-MOS Device Characteristics," IEEE Transactions on Electron Devices, Vol. 53, No. 5, pp. 1282-1285, May 2006. [SCI]  [DOWNLOAD]
  69. Woo Yong Choi, Jong Duk Lee, and Byung-Gook Park, "Characterization and Design Consideration of 80-nm Self-Aligned N-/P-Channel I-MOS Devices," Journal of Semiconductor Technology and Science, Vol. 6, No. 1, pp. 43-51, March 2006.  [DOWNLOAD]
  70. Sung Hun Jin, Keum Dong Jung, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, "Grain size effects on contact resistance of top-contact pentacene TFTs," Synthetic Metals, pp. 196-201, January 2006. [SCI]  [DOWNLOAD]
  71. Sung Hun Jin, Cheon An Lee, Keum Dong Jung, Hyungcheol Shin, Byung-Gook Park, and Jong Duk Lee, "Performance Improvement of Scaled-Down Top-Contact OTFTs by Two-Step-Deposition of Pentacene," IEEE Electron Device Letters, Vol. 26, No. 12, pp. 903-905, December 2005. [SCI]  [DOWNLOAD]
  72. B.Y. Choi, B.-G. Park, J.D. Lee, H. Shin, Y.K. Lee, K.H. Bai, D.-D. Kim, D.-W. Kim, C.-H. Lee and D. Park, "Reliable 2-bit/cell NVM technology using twin SONOS memory transistor," IEE Electronics Letters, Vol. 41, No. 19, pp. 1086-1087, September 2005.[SCI]  [DOWNLOAD]
  73. Seongjae Cho, Il Han Park, Tae Hun Kim, Jung Hoon Lee, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Quantitative Analysis on Voltage Schemes for Reliable operations of a Floating Gate Type Double Gate Nonvolatile Memory Cell ," Journal of Semiconductor Technology and Science, Vol. 5, No. 3, pp. 195-203, September 2005. [DOWNLOAD]
  74. Byung-Gook Park, Byung Yong Choi, Woo Young Choi, Yong Kyu Lee, Jong Duk Lee, Hyungcheol Shin, Suk-Kang Sung, Tae-Yong Kim, Eun Suk Cho, Byung Kyu Cho, Keun Hee Bai, Dong-Dae Kim, Dong-Won Kim, Choong-Ho Lee and Donggun Park, "Highly Manufacturable and Reliable 80-nm Gate Twin Silicon-Oxide-Nitride-Oxide-Silicon Memory Transistor," Jpn. J. Appl. Phys. Vol. 44, pp. L 1214-L 1217, No. 39, September 2005. [SCI] [DOWNLOAD]
  75. Ki-Whan Song, Yong Kyu Lee, Jae Sung Sim, Hoon Jeoung, Jong Duk Lee, Byung-Gook Park, You Seung Jin, and Young-Wug Kim, "SET/CMOS Hybrid Process and Multiband Filtering Circuits," IEEE Transactions on Electron Devices, Vol. 52, No. 8, pp. 1845-1850, August 2005. [SCI]  [DOWNLOAD]
  76. Chang-Bum Park, Keum-Dong Jung, Sung Hun Jin, Byung-Gook Park, and Jong Duk Lee, "Pentacene-based Thin Film Transistors with Improved Mobility Characteristics using Hybrid Gate Insulator," Journal of Information Display, vol. 6, no. 2, pp. 16-18, June 2005.   [DOWNLOAD]
  77. Woo Young Choi, Jae Young Song, Jong Duk Lee, Young June Park, and Byung-Gook Park, "A Novel Biasing Scheme for I-MOS (Impact-Ionization MOS) Devices," IEEE Transactions on Nanotechnology, Vol. 4, No. 3, pp. 322-325, May 2005. [SCIE]   [DOWNLOAD]
  78. Kyung Rok Kim, Hyun Ho Kim, Ki-Whan Song, Jung Im Huh, Jong Duk Lee, and Byung-Gook Park, "Field-Induced Interband Tunneling Effect Transistor (FITET) With Negative-Differential Transconductance and Negative-Differential Conductance," IEEE Transactions on Nanotechnology, Vol. 4, No. 3, pp. 317-321, May 2005. [SCIE]   [DOWNLOAD]
  79. Ki-Whan Song, Yong Kyu Lee, Jae Sung Sim, Kyung Rok Kim, Jong Duk Lee, Byung-Gook Park, Young Sub You, Joo-On Park, You Seung Jin and Young-Wug Kim, "Complementary Self-Biased Logics Based on Single-Electron Transistor (SET)/CMOS Hybrid Process," Jpn. J. Appl. Phys. Vol. 44, pp. 2618-2622, No. 4B, April 2005. [SCI] [DOWNLOAD]
  80. Woo Young Choi, Jae Young Song, Jong Duk Lee, Young June Park, and Byung Gook Park, "100-nm n-/p-Channel I-MOS Using a Novel Self-Aligned Structure," IEEE Electron Device Letters, Vol. 26, No. 4, pp. 261-263, April 2005. [SCI]  [DOWNLOAD]
  81. Sang Min Yi, Sung Hun Jin, Jong Duk Lee and Chong Nam Chu, "Fabrication of a high-aspect-ratio stainless steel shadow mask and its application to pentacene thin-film transistors," Journal of Micormechanics and Microengineering, Vol. 15, No. 2, pp. 263-269, February 2005. [SCI]  [DOWNLOAD]
  82. Hyung Soo Uh, Sung Woo Ko, Jong Duk Lee, "Growth and field emission properties of carbon nanotubes on rapid thermal annealed Ni catalyst using PECVD," Diamond & Related Materials, Vol. 14, pp. 850-854, 2005. [SCI]  [DOWNLOAD]
  83. Sang Jik Kwon, Hak June Chung, Sang Heon Lee, Hyung Wook Choi, Young Hwa Shin, Dal Ho Lee, and Jong Duk Lee, "Characterization of Triod-type CNT-FED Fabricated using Photo-sensitive CNT Paste," Journal of Information Display, Vol. 5, No. 4, pp. 18-22, December, 2004. [DOWNLOAD]
  84. Junsoo Kim, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "MOSFETs with Biased Spacer Having Different Work Function from the Gate," Journal of Korean Physical Society, Vol. 45, No. 5, pp. 1-5, November 2004. [SCI]  [DOWNLOAD]
  85. Sang Sik Park, Hyuck In Kwon, O Jun Kwon, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, Yong Jei Lee and Yong Hee Lee, "The Influence of Deuterium Annealing on the Evolution of Interface Trap Capture Cross Sections in n-MOSFET under Channel-Hot-Electron and Fowler-Nordheim Stresses," Journal of Korean Physical Society, Vol. 45, No. 5, pp. 1300-1303, November 2004. [SCI]  [DOWNLOAD]
  86. Woo Young Choi, Hwi Kim, Byoungho Lee, Jong Duk Lee, and Byung-Gook Park, "Stable Threshold Voltage Extraction Using Tikhonov’s Regularization Theory," IEEE Transactions on Electron Devices, Vol. 51, No. 11, pp. 1833-1839, November 2004. [SCI]  [DOWNLOAD]
  87. Jae Sung Sim, Jong Duk Lee and Byung-Gook Park, "The simulation of single-charging effects in the programming characteristics of nanocrystal memories," Nanotechnology, Vol. 15, No. 10, pp. S603-S611, October 2004. [SCI]  [DOWNLOAD]
  88. Yong Kyu Lee, Jong Duk Lee, Byung-Gook Park, Sung Taeg Kang, Chilhee Chung, and Donggun Park, "Inverted sidewall spacer and inner offset oxide process for excellent 2-bit silicon-oxide-nitride-oxide-silicon memory under 100 nm gate length", Journal of Vacuum Science and Technology B, Vol. 22, No. 5, pp. 2493-2498, Sep./Oct. 2004 [SCI]  [DOWNLOAD]
  89. Hyung Soo Uh, Soo Myun Lee, Pil Goo Jeon, Byung Hwak Kwak, Sang Sik Park, Sang Jik Kwon, Euo Sik Cho, Sung Woo Ko, Jong Duk Lee, Chun Gyoo Lee, "Selective growth of carbon nanotubes and their application to triode-type field emitter arrays," Thin Solid Films, Volume 462-463, pp. 19-23, September, 2004. [SCI]  [DOWNLOAD]
  90. Euo Sik Cho, Cheon An Lee, Gwanghyeon Baek, Hyung Soo Uh, Sang Jik Kwon, Hyungcheol Shin, Byung-Gook Park, and Jong Duk Lee, "Effects of phosphorus implantation and subsequent growth on diamond," Thin Solid Films, Volume 462-463, pp. 24-28, September, 2004. [SCI]  [DOWNLOAD]
  91. Yong Kyu Lee, Suk Kang Sung, Jae Sung Sim, Ki Whan Song, Jong Duk Lee, Byung-Gook Park, Sung Taeg Kang, Chilhee Chung, Donggun Park, Kinam Kim, "Scalable 2-bit silicon-oxide-nitride-oxide-silicon (SONOS) memory with physically separated local nitrides under a merged gate," Solid-State Electronics, Vol. 48, Issues 10-11, pp. 1771-1775, October-November 2004. [SCI]  [DOWNLOAD]
  92. Hyuck In Kwon, O Jun Kwon, Hyungcheol Shin, Byung-Gook Park, Sang Sik Park, and Jong Duk Lee, "The Effects of Deuterium Annealing on the Reduction of Dark Currents in the CMOS APS" IEEE Transactions on Electron Devices, Vol. 51, No. 8, pp. 1346-1349, August 2004. [SCI] [DOWNLOAD]
  93. Tae Hun Kim, Jae Sung Sim, Jong Duk Lee, Hyung Cheol Shin, and Byung-Gook Park, "Charge decay characteristics of silicon-oxide-nitride-oxide-silicon structure at elevated temperatures and extraction of the nitride trap density distribution," Appl. Phys. Lett., Vol. 85, No. 4, pp. 660-662, July 2004. [SCI] [DOWNLOAD]
  94. Kyung Rok Kim, Dae Hwan Kim, Ki-Whan Song, Gwanghyeon Baek, Hyun Ho Kim, Jung Im Huh, Jong Duk Lee, and Byung Gook Park, "Silicon-Based Field-Induced Band-to-band Tunneling Effect Transistor," IEEE Electron Device Letters, Vol. 25, No. 6, pp. 439-441, June 2004. [SCI]  [DOWNLOAD]
  95. Byung-Gook Park, Dong-Soo Woo and Jong Duk Lee, "Self-aligned FinFETs with Wide Source/Drain Regions," Transactions of the Materials Research Society of Japan, Vol. 29, No. 3, pp.701-705, May 2004. [DOWNLOAD]
  96. Yong Kyu Lee, Ki Whan Song, Jae Woong Hyun, Jong Duk Lee, Byung Gook Park, Sung Taeg Kang, Jeong Dong Choe, Sang Yeon Han, Jeong Nam Han, Sung Woo Lee, O. Ik Kwon, Chilhee Chung, Donggun Park, and Kinam Kim, "Twin SONOS Memory With 30-nm Storage Nodes under a Merged Gate Fabricated With Inverted Sidewall and Damascene Process," IEEE Electron Device Letters, Vol. 25, No. 5, pp. 317-319, May 2004. [SCI]  [DOWNLOAD]
  97. Jae Sung Sim, Jihye Kong, Jong Duk Lee and Byung-Gook Park, "Monte Carlo Simulation of Single-Electron Nanocrystal Memories," Jpn. J. Appl. Phys. Vol. 43, pp. 2041-2045, Part 1, No. 4B, April 2004. [SCI] [DOWNLOAD]
  98. Kyung Rok Kim, Ki-Whan Song, Dae Hwan Kim, Gwanghyeon Baek, Hyun Ho Kim, Jung Im Huh, Jong Duk Lee, Byung-Gook Park, "Analytical Modeling of Realistic Single-Electron Transistors Based on Metal-Oxide-Semiconductor Structure with a Unique Distribution Function in the Coulomb-Blockade Oscillation Region," Jpn. J. Appl. Phys. Vol. 43, pp. 2031-2035, Part 1, No. 4B, April 2004. [SCI] [DOWNLOAD]
  99. Woo Young Choi, Dong Soo Woo, Byung Yong Choi, Jong Duk Lee and Byung-Gook Park, "Stable Extraction of Threshold Voltage Using Transconductance Change Method for CMOS Modeling, Simulation and Characterization," Jpn. J. Appl. Phys. Vol. 43, pp. 1759-1762, Part 1, No. 4B, April 2004. [SCI] [DOWNLOAD]
  100. Kyung Rok Kim, Dae Hwan Kim,  Jong Duk Lee, and Byung-Gook Park, "Coulomb Oscillations Based on Band-to-band Tunneling in a Degenerately Doped Silicon Metal-Oxide-Semiconductor Field-Effect Transistor," Virtual Journal of Nanoscale Science & Technology, Volume 9, Issue 16, (APL Vol. 84, pp. 3178-3180), Apr. 2004. [SCI] [DOWNLOAD]
  101. Cheon An Lee, Sung Hun Jin, Hyuck In Kwon, Il Whan Cho, Jihye Kong, Chang Ju Lee, Myung Won Lee, Jae Woo Kyung, Jong Duk Lee, and Byung-Gook Park, "A High Voltage NMOSFET Fabricated by using a Standard CMOS Logic Process as a Pixel-driving Transistor for the OLED on the Silicon Substrate," Journal of Information Display, Vol. 5, No. 1, pp. 28-33, March, 2004. [DOWNLOAD]
  102. Kyung Rok Kim, Dae Hwan Kim, Jong Duk Lee, Byung-Gook Park, "Coulomb Oscillations Based on Band-to-band Tunneling in a Degenerately Doped Silicon Metal-Oxide-Semiconductor Field-Effect Transistor," Appl. Phys. Lett., Vol. 84, No. 16, pp. 3178~3180, Apr. 2004. [SCI] [DOWNLOAD]
  103. Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Stable Extraction of Linearity (VIP3) for Nanoscale RF CMOS Devices," IEEE Microwave and Wireless Components Letters, Vol. 14, No 2, pp. 83-85, February 2004. [SCI] [DOWNLOAD]
  104. Hyuck In Kwon, In Man Kang, Byung-Gook Park, Sang Sik Park, and Jong Duk Lee, "The Analysis of Dark Signals in the CMOS APS Imagers From the Characterization of Test Structures," IEEE Transactions on Electron Devices, Vol. 51, No. 2, pp. 178-184, Feb. 2004. [SCI]  [DOWNLOAD]
  105. Hyuck In Kwon, In Man Kang, Byung-Gook Park, Jong Duk Lee, Sang Sik Park, Jung Chak Ahn, and Yong Hee Lee, "Effects of electrical stress on mid-gap interface trap density and capture cross sections in n-MOSFETs characterized by pulsed interface probing measurements," Microelectronics Reliability, Vol. 44, Issue 1, pp. 47-51, Jan. 2004. [SCI]  [DOWNLOAD]
  106. Yong Jin Yoon, Hyuck In Kwon, Jong Duk Lee, Byung-Gook Park, Nam Seog Kim, Uk Rae Cho, and Hyun Geun Byun, "Synchronous Mirror Delay for Multiphase Locking," IEEE Journal of Solid-State Circuits, Vol. 39, No. 1, pp. 150-156, Jan. 2004. [SCI]  [DOWNLOAD]
  107. Sung Hun Jin, Jin Wook Kim, Chun An Lee, Byung-Gook Park, and Jong Duk Lee, "Surface-State Modification of OTFT Gate Insulators by Using a Dilute PMMA Solution," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 185-189, January 2004. [SCI]  [DOWNLOAD]
  108. Sung Hun Jin, Jae Sung Yu, Chun An Lee, Jin Wook Kim, Byung-Gook Park, and Jong Duk Lee, "Pentacene OTFTs with PVA Gate Insulators on a Flexible Substrate," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 181-184, January 2004. [SCI]  [DOWNLOAD]
  109. Euo Sik Cho, Byung-Gook Park, Jong Duk Lee, Hyung Soo Uh, and Sang Jik Kwon, "Effect of Phosphorus Implantation and Subsequent Growth on the Surface Morphologies and the Electrical Properties of Diamond," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 153-156, January 2004. [SCI]  [DOWNLOAD]
  110. Ki-Whan Song, Kyung Rok Kim, Jong Duk Lee, Byung-Gook Park, Sang-Hoon Lee, and Dae Hwan Kim, "A SPICE Model of Realistic Single-Electron Transistors and Its Application to Multiple-Valued Logic," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 121-124, January 2004. [SCI]  [DOWNLOAD]
  111. Il Hwan Cho, Byung Gook Park, Jong Duk Lee, Tai-su Park, Si Young Choi and Jong Ho Lee, "Body-Tied Double-Gate SONOS Flash (Omega Flash) Memory Device Built on a Bulk Si wafer," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 83-86, January 2004. [SCI]  [DOWNLOAD]
  112. In Man Kang, Hyuck In Kwon, Myung Won Lee, Byung-Gook Park, Jong Duk Lee, Sang Sik Park, Jung Chak Ahn, and Yong Hee Lee, "Characteristics of Conventional STI Process-Related Deep Level Traps in Silicon," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 69-72, January 2004. [SCI]  [DOWNLOAD]
  113. Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Reverse-Order Source/Drain with Double Offset Spacer Design Optimization for Sub-50-nm Low-Power MOSFETs," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 60-64, January 2004. [SCI]  [DOWNLOAD]
  114. Hyuck In Kwon, In Man Kang, Byung-Gook Park, Jong Duk Lee, Woo Suk Hyun, Sang Sik Park, Jung Chak Ahn, and Yong Hee Lee, "Effects of Electrical Stress on the Mid-Gap Interface Trap Density and the Capture Cross Sections Characterized by Pulsed Interface Probing (PIP) Measurements," Journal of Korean Physical Society, Vol. 44, No. 1, pp. 46-49, January 2004. [SCI]  [DOWNLOAD]
  115. Suk-Kang Sung, Il Han Park, Chang Ju Lee, Yong Kyu Lee, Jong Duk Lee, Byung-Gook Park,Soo Doo Chae, Chung Woo Kim, "Fabrication and Program/Erase Characteristics of 30-nm SONOS Nonvolatile Memory Devices," IEEE Transactions on Nanotechnology, Vol. 2, Issue 4, pp. 258-264, Dec. 2003. [SCIE]   [DOWNLOAD]
  116. Yong Kyu Lee, Tae Hun Kim, Sang Hoon Lee, Jong Duk Lee and Byung-Gook Park, "Twin-Bit Silicon-Oxide-Nitride-Oxide-Silicon(SONOS) Memory by Inverted Sidewall Patterning (TSM-ISP)," IEEE Transactions on Nanotechnology, Vol. 2, Issue 4, pp. 246-252, Dec. 2003. [SCIE]   [DOWNLOAD]
  117. Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Reverse-Order Source/Drain Formation with Double Offset Spacer (RODOS) for Low-Power and High-Speed Application," IEEE Transactions on Nanotechnology, Vol. 2, Issue 4, pp. 210-216, Dec. 2003. [SCIE]   [DOWNLOAD]
  118. Hyung Soo Uh, Soo Myun Lee, Seok Rim Choi, Sang Sik Park, Euo Sik Cho, Jong Duk Lee, and Sang Jik Kwon, "Effect of Plasma Pretreatment on the Structure and Emission Characteristics of Carbon Nanotubes," Journal of Korean Physical Society, Vol. 43, No. 5, pp. 929~934, November 2003.[SCI]  [DOWNLOAD]
  119. Sang Jik Kwon, Tae Ho Kim, Byeong Kyoo Shon, Euo Sik Cho, Jong Duk Lee, Hyung Soo Uh, Sung Hee Cho, and Chun Gyoo Lee, "A Vacuum In-Line Sealing Technology of the Screen Printed CNT-FEA," Journal of Information Display, Vol. 4, No. 3, pp 6-11, September, 2003. [DOWNLOAD]
  120. Byung-Gook Park, Dae Hwan Kim, Kyung Rok Kim, Ki-Whan Song, Jong Duk Lee, "Single-electron transistors fabricated with sidewall spacer patterning," Superlattices and Microstructures, Vol. 34, pp. 231-239, September-December 2003. [SCI] [DOWNLOAD]
  121. Dong-Soo Woo, Byung Yong Choi, Woo Young Choi, Myeong Won Lee, Jong Duk Lee, and Byung-Gook Park, "30 nm self-aligned finfet with large source/drain fan-out structure," IEE Electronics Letters, Vol. 39, Issue. 15, pp. 1154~1155, July 2003.[SCI]  [DOWNLOAD]
  122. Kyung-Hoon Chung, Woo Young Choi, Suk-Kang Sung, Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Pattern multiplication method and the uniformity of nanoscale multiple lines," J. Vac. Sci. Technol. B. Vol. 21, Issues 4, pp. 1491-1495, July 2003. [SCI]  [DOWNLOAD]
  123. Euo Sik Cho, Sang Jik Kwon, Hwi Chan Yang, Hyung Soo Uh, Yeo Hwan Kim, Byung-Gook Park and Jong Duk Lee, "Fabrication and characterization of phosphorus-implanted mold-type diamond field-emitter arrays," Thin Solid Films, Vol. 435, Issues 1-2, pp. 324~328, July 2003.[SCI]  [DOWNLOAD]
  124. Il Hwan Cho, Byung Gook Park, Jong Duk Lee and Jong Ho Lee, "Nano-Scale SONOS Memory with a Double-Gate MOSFET Structure," Journal of the Korean Physical Society, Vol. 42, No. 2, pp. 233~236, Feb. 2003.[SCI]  [DOWNLOAD]
  125. Euo Sik Cho, Byung-Gook Park, and Jong Duk Lee, Sang Jik Kwon, "Field emission properties of phosphorus doped microwave plasma chemical vapor deposition diamond films by ion implantation," J. Vac. Sci. Technol. B. Vol. 21, Issues 1, pp. 603-607, January/February 2003. [SCI]  [DOWNLOAD]
  126. Il Hwan Kim, Jong Duk Lee, Chang Woo Oh, Jae Woo Park, and Byung-Gook Park, "Metal-oxide-semiconductor field effect transistor-controlled field emission display," J. Vac. Sci. Technol. B. Vol. 21, Issues 1, pp. 519-522, January/February 2003. [SCI]  [DOWNLOAD]
  127. Jong Duk Lee, Chang Woo Oh, and Byung-Gook Park, "Electrical aging of molybdenum field emitters," J. Vac. Sci. Technol. B. Vol. 21, Issues 1, pp. 440-444, January/February 2003. [SCI]  [DOWNLOAD]
  128. Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook Park, "Single-Electron Transistors Based on Gate-Induced Si Island for Single-Electron Logic Application," IEEE Transactions on Nanotechnology, Vol. 1, No. 4, pp. 170-175, Dec. 2002.   [DOWNLOAD]
  129. Sang-Hoon Lee, Dae Hwan Kim, Kyung Rok Kim, Jong Duk Lee, Byung-Gook Park, Young-Jin Gu, Gi-Young Yang, and Jeong-Taek Kong, "A Practical SPICE Model Based on the Physics and Characteristics of Realistic Single-Electron Transistors," IEEE Transactions on Nanotechnology, Vol. 1, No. 4, pp. 226-232, Dec. 2002.   [DOWNLOAD]
  130. Dong-Soo Woo, Jong-Ho Lee, Woo Young Choi, Byung-Yong Choi, Young-Jin Choi, Jong Duk Lee, and Byung-Gook Park, "Electrical Characteristics of FinFET With Vertically Nonuniform Source/Drain Doping Profile," IEEE Transactions on Nanotechnology, Vol. 1, No. 4, pp. 233-237, Dec. 2002.   [DOWNLOAD]
  131. Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook Park, "Fabrication of single-electron tunneling transistors with an electrically formed Coulomb island in a silicon-on-insulator nanowire," Virtual Journal of Nanoscale Science & Technology, Volume 6, Issue 25, (JVSTb Vol. 20, pp. 1410-1418), Dec. 2002. [SCI]  [DOWNLOAD]
  132. Yong Kyu Lee, Suk Kang Sung, Jae Seong Sim, Chang Ju Lee, Tae Hun Kim, Jong Duk Lee, Byung Gook Park, Dong Hun Lee and Young Wug Kim, "Multi-Level Vertical-Channel SONOS Nonvolatile Memory Using a Standard SOI Logic Process," Journal of the Korean Physical Society, Vol. 41, No. 6, pp. 908~911, Dec. 2002. [SCI]  [DOWNLOAD]
  133. Yong Kyu Lee, Jae Sung Sim, Suk Kang Sung, Chang Ju Lee, Tae Hun Kim, Jong Duk Lee, Byung Gook Park, Dong Hun Lee, and Young Wug Kim, "Multilevel Vertical-Channel SONOS Nonvolatile Memory on SOI," IEEE Electron Device Letters, Vol. 23, No. 11, pp. 664-666, Nov. 2002. [SCI]  [DOWNLOAD]
  134. Cheon An Lee, Dong Soo Woo, Hyuck In Kwon, Yong Jin Yoon, Jong Duk Lee, and Byung-Gook Park, "Design of a CMOS On-chip Driver Circuit for Active Matrix Polymer Electroluminescent Displays," Journal of Information Display, Vol. 3, NO. 2, pp 1-5, June, 2002. [DOWNLOAD]
  135. Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, Byung-Gook Park, Bum Ho Choi, Sung Woo Hwang and Doyeol Ahn, "Single-Electron Transistors with Sidewall Depletion Gates on an SOI Nanowire and Their Application to Single-Electron Inverters," Journal of The Korean Physical Society, Vol. 41, No. 4, pp. 505-508, Oct. 2002. [SCI]  [DOWNLOAD]
  136. Woo Young Choi, Byung Yong Choi, Young Jin Choi, Dong-Soo Woo, Suk-Kang Sung, Jong Duk Lee and Byung-Gook Park, "Fabrication of a 30-nm Planar nMOSFETs Based on the Sidewall Patterning Technique," Journal of The Korean Physical Society, Vol. 41, No. 4, pp. 497-500, Oct. 2002. [SCI]  [DOWNLOAD]
  137. Young Jin Choi, Byung Yong Choi, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook Park, "A new 50-nm nmosfet with side-gates for virtual source-drain extensions," IEEE Transactions on Electron Devices, Vol. 49, No. 10, pp. 1833-1835, Oct. 2002. [SCI]  [DOWNLOAD]
  138. Kyung Rok Kim, Dae Hwan Kim, Suk-Kang Sung, Jong Duk Lee, and Byung-Gook Park, "Negative-differential transconductance characteristics at room temperature in 30-nm square-hannel SOI nMOSFETs with a degenerately doped body," IEEE Electron Device Letters, Vol. 23, No. 10, pp. 612 -614, Oct. 2002. [SCI]  [DOWNLOAD]
  139. Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook Park, "Fabrication of single-electron tunneling transistors with an electrically formed Coulomb island in a silicon-on-insulator nanowire," J. Vac. Sci. Technol. B. Vol. 20, Issues 4, pp. 1410-1418, July/August 2002. [SCI]  [DOWNLOAD]
  140. B.H. Choi, S.H. Son, K.H. Cho, S.W. Hwang, D. Ahn, D.H. Kim, J.D. Lee, B.G. Park, "Direct observation of excited states in double quantum dot silicon single electron transistor," Microelectronic Engineering. Vol. 63, Issues 1-3, pp. 129-133, July 2002. [SCI]  [DOWNLOAD]
  141. Kyung-Hoon Chung, Suk-Kang Sung, Dae Hwan Kim, Woo Young Choi, Cheon An Lee, Jong Duk Lee and Byung-Gook Park, "Nanoscale Multi-Line Patterning Using Sidewall Structure," Jpn. J. Appl. Phys. Vol. 41, pp. 4410-4414, Part 1, No. 6B, June 2002. [SCI]  [DOWNLOAD]
  142. B. H. Choi, Y. S. Yu, D. H. Kim, S. H. Son, K. H. Cho, S. W. Hwang, D. Ahn, and B. G. Park, "Double-dot-like charge transport through a small size silicon single electron transistor," Physica E, Vol. 13, pp. 946-949, March 2002. [SCI]  [DOWNLOAD]
  143. Dae Hwan Kim, Kyung Rok Kim, Suk Kang Sung, Jong Duk Lee, and Byung-Gook Park, "Dynamic exclusive-OR gate based on gate-induced Si island single electron transistor," IEE Electronics Letters, Vol. 38, No. 11, pp. 527~529, May 2002.[SCI]  [DOWNLOAD]
  144. B. Y. Choi, W. Y. Choi, J. D. Lee, B.-G. Park, "50nm MOSFETs with side-gates for induced source/drain extension," IEE Electronics Letters, Vol. 38, No. 11, pp. 526~527, May 2002.[SCI]  [DOWNLOAD]
  145. Jong Duk Lee, Jung Hyun Nam, Hyuck In Kwon and Byung-Gook Park, "Design and Fabrication of the Driving Circuits for One-Chip FED on the Standard CMOS Process," Journal of the Korean Physical Society, Vol. 40, No. 4, pp. 592~594, April 2002.[SCI]  [DOWNLOAD]
  146. Suk-Kang Sung, Dae Hwan Kim, Jae-Sung Sim, Kyung Rok Kim, Yong Kyu Lee, Jong Duk Lee, Soo Doo Chae, Byung Man Kim, and Byung-Gook Park, "Single-Electron MOS Memory with a Defined Quantum Dot Based on Conventional VLSI Technology," Jpn. J. Appl. Phys. Vol. 41, Part 1, No. 4B, pp. 2606-2610, Apr. 2002.[SCI]  [DOWNLOAD]
  147. Kyung Rok Kim, Dae Hwan Kim, Suk-Kang Sung, Jong Duk Lee, Byung-Gook Park, Bum Ho Choi, Sung Woo Hwang, and Doyeol Ahn, "Single-Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Nano-Wire," Jpn. J. Appl. Phys. Vol. 41, Part 1, No. 4B, pp. 2574-2577, Apr. 2002.[SCI]  [DOWNLOAD]
  148. Woo Young Choi, Byung Yong Choi, Dong Soo Woo, Young Jin Choi, Jong Duk Lee, and Byung-Gook Park, "Side-Gate Design Optimization of 50 nm MOSFETs with Electrically Induced Source/Drain," Jpn. J. Appl. Phys. Vol. 41, Part 1, No. 4B, pp. 2345-2347, Apr. 2002.[SCI]  [DOWNLOAD]
  149. Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, Byung-Gook Park, Bum Ho Choi, Sung Woo Hwang, Doyeol Ahn, "Silicon single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic," IEEE Transactions on Electron Devices, Vol. 49, NO. 4, pp. 627-635, Apr. 2002. [SCI]  [DOWNLOAD]
  150. Hyung Soo Uh, Sang Sik Park, and Jong Duk Lee, "Low turn-on voltage Mo-polycide field emitter arrays applied to field emission flat panel display," Journal of Vac. Sci. Tech. B, Vol. 20, No. 1, pp. 203-208, Jan/Feb 2002. [SCI]  [DOWNLOAD]
  151. Dong-Soo Woo, Boo Sik Park, Jong Duk Lee, and Byung-Gook Park, "Fabrication of a 0.2um Ultra-Thin SOI Inverted Sidewall Recessed Channel with Single-Type Polysilicon Gate," Journal of the Korean Physical Society, Vol. 40, No. 1, pp. 68~71, Jan. 2002.[SCI]  [DOWNLOAD]
  152. Jong Duk Lee, Yong Jin Yoon, Cheol Shin Kwak, and Byung-Gook Park, "Synchronous Mirror Delay for Zero- and Multi-Phase Locking," Journal of the Korean Physical Society, Vol. 40, No. 1, pp. 87~89, Jan. 2002.[SCI]  [DOWNLOAD]
  153. Suk-Kang Sung, Jae-Sung Sim, Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Nanoscale-Wire Patterning Using Side-Wall and Quantum Dot Memory Device Fabrication," Journal of the Korean Physical Society, Vol. 40, No. 1, pp. 128~131, Jan. 2002.[SCI]  [DOWNLOAD]
  154. Kyung Rok Kim, Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Characteristics of Silicon-On-Insulator Single-Electron Transistors with Electrically Induced Tunnel Barriers," Journal of the Korean Physical Society, Vol. 40, No. 1, pp. 140~144, Jan. 2002.[SCI]  [DOWNLOAD]
  155. D. H. Kim, S.-K. Sung, J. S. Sim, K. R. Kim, J. D. Lee, B.-G. Park, B. H. Choi, S. W. Hwang, and D. Ahn, "Single-electron transistor based on silicon-on-insulator quantum wire fabricated by a side-wall patterning method," Appl. Phys. Lett., Vol. 79, pp. 3812~3814, Dec. 2001.[SCI]  [DOWNLOAD]
  156. In-Ho Nam, Jae Sung Sim, Sung In Hong, Byung-Gook Park, Jong Duk Lee, Seung-Woo Lee, Man-Sug Kang, Young-Wug Kim, Kwang-Pyuk Suh, Won Seong Lee, "Ultrathin gate oxide grown on nitrogen-implanted silicon for deep submicron CMOS transistors," IEEE Transactions on Electron Devices, Vol. 48, NO. 10, pp. 2310-2316, Oct. 2001.[SCI]  [DOWNLOAD]
  157. Jong Duk Lee, Chang Woo Oh, Il Hwan Kim, Jae Woo Park and Byung Gook Park , “Emission Characteristics of 0.7" Monochrome MOSFET-Controlled Field Emission Displays(MCFEDs)in High Vacuum Chamber”, Journal of Information Display, Vol. 2, NO. 3, pp 66-71, September, 2001. [DOWNLOAD]
  158. Byung Yong Choi, In-Ho Nam, Jong Duk Lee and Byung-Gook Park, "Sub-0.1-um NMOSFET with 12-nm n+-p Junction Using 5-keV As2+ Ion Implantation," Journal of The Korean Physical Society, Vol.39, No.1, pp. 72-75, July 2001.[SCI]  [DOWNLOAD]
  159. Jong Duk Lee, Euo Sik Cho and Sang Jik Kwon, "Fabrication of triode diamond field emitter arrays on glass substrate by anisotropic conductive film bonding," J. Vac. S.cTechnol. B 19 Vol3 , pp. 954-957, May/June 2001.[SCI]  [DOWNLOAD]
  160. Jong Duk Lee, Sung Hun Jin, Byung Chang Shim, Byung-Gook Park, "A Formation of Co Silicide on Silicon Field Emitter Arrays by Electrical Stress", IEEE Electron Device Letters, Vol. 22, No. 4, pp. 173-175, April 2001.[SCI][SCI]
  161. Byung Yong Choi, Suk Kang Sung, Byung-Gook Park, and Jong Duk Lee “70nm NMOSFET Fabrication with 12nm n+-p Junctions Using As2+ Low Energy Implantation”, Jpn. J. Appl. Phys., Vol. 40, pp. 2607~2610, April, 2001.[SCI]  [DOWNLOAD]
  162. Jong Duk Lee, Yong Jin Yoon, Kyoung Hwa Lee and Byung-Gook Park, “Application of Dynamic Pass-Transistor Logic to an 8-Bit Multiplier”, Journal of The Korean Physical Society, Vol.38, No.3, pp220-223, March, 2001.[SCI]
  163. Jong Duk Lee, Byung Chang Shim and Byung Gook Park, “Co Silicide Field Emitter Arrays Formed from Ti/Co Layers”, Journal of The Korean Physical Society, Vol.38, No.3, pp210-214, March, 2001.[SCI]
  164. Jong Duk Lee, Sung Hun Jin, Byung Chang Shim and Byung Gook Park, “Co Silicide Formation on Single Crystal Silicon Field Emitter Arrays by Using Electrical Stress”, Journal of The Korean Physical Society, Vol.38, No.3, pp203-206, March, 2001.[SCI]
  165. Byung Yong Choi, Suk Kang Sung, Jong Duk Lee, and Byung -Gook Park, "70nm NMOSFET Fabrication with Ultra-shallow n+-p Junctions Using Low Energy As2+ Implantayions", Journal of The Institute of Electronics Engineerings of Korea , Volume 38-SD, Number. 2, pp. 9-17, February, 2001.
  166. Jong Duk Lee, Byung Chang Shim, Byung-Gook Park, "Silicide Application on Gated-Crystal, Polycrystalline and Amorphous silicon FEAs - Part II: Co Silicide", IEEE Transactions on Electron Devices, Vol. 48, NO. 1, January, 2001.[SCI]
  167. Jong Duk Lee, Byung Chang Shim, Byung-Gook Park, "Silicide Application on Gated-Crystal, Polycrystalline and Amorphous silicon FEAs - Part I: Mo Silicide", IEEE Transactions on Electron Devices, Vol. 48, NO. 1, January, 2001.[SCI]
  168. Jong Duk Lee, Byung Chang Shim, Byung Gook Park, and Sang Jik Kwon, “Molybdenum and Cobalt Silicide Field Emitter Arrays”, Journal of Information Display, Vol. 1, NO. 1 December, 2000.
  169. Yeong Taek Lee, Dong Soo Woo, Jong Duk Lee, and Byung Gook Park, "Threshold Voltage Reduction Model for Buried Channel PMOSMETs Using Quasi-2-D Poisson Equation", IEEE Transactions on Electron Devices, Vol. 47, NO. 12, pp 2326-2333,December, 2000.[SCI]  [DOWNLOAD]
  170. Sang Jik Kwon, Kun Cho Hong, Jung Ho Sung, Chang Ho Lee, Ki Woong Whang, Cha Keun Yoon, Jong Duk Lee, Seong Hyeon Hong, Sun Woo Park, Yong Bum Kwon, “Operational PDP Fabrication Using a Fully Vacuum In-Line Sealing Technology”, Jounal of the Korean Physical Society, Vol. 37, No. 3, pp 247-252, September, 2000.[SCI]
  171. S.H.Cho, S.H.Kwon, J.S.Yoo, C.W.Oh, J.D.Oh, J.D.Lee, K.J.Hong, S.J.Kwon, “Cathodluminescent Characteristics of a Spherical Y2O3 : Eu Phosphor Screen for Field Emission Display Application”, Jounal of the Electrochemical Society, Vol. 147, No. 8, pp3143-3147, August, 2000.[SCI]
  172. S.H. Kwon, H. Cho, J.S. Yoo, J.D.Lee, “Fabrication of Full-color Phosphor Screen by Electrophoretic Deposition for Field Emission Display Application” , Jounal of the Electrochemical Society, Vol. 147, No. 8, pp3120-3124, August, 2000.[SCI]
  173. Sang Jik Kwon, Kun Jo Hong, Jong Duk Lee, Chang Woo Oh, Jae Soo Yoo, Yong Bum Kwon, “Influence of getter activation and aging in a frit-sealed field emission display panel”, Journal`of Vacuum Science Technology, pp 1227~1231 , May/June , 2000.[SCI]
  174. Sangyeon Han, Sun a Yang, Taekeun Hwang, Jongho Lee, Jong Duk Lee and Hyungcheol Shin,"Lateral Silicon Field Emission Devices using Electron Beam Lithography", Jpn. J. Appl. Phys., Vol. 39, pp. 2556~2559, May, 2000.[SCI]
  175. Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Room Temperature Coulomb Oscillation of a Single Electron Switch with an Ectrically Formed Quantum Dot and Its Modeling," Jpn. J. Appl. Phys., Vol. 39, pp. 2329~2333, April, 2000.[SCI]  [DOWNLOAD]
  176. Tae-Sik Yoon, Jang-Yeon Kwon, Dong-Hoon Lee, Ki-Bum Kim, Seok-Hong Min, Dong-Hyuk-Chae, Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "High spatial density nanocrystal formation using thin layer of amorphous Si0.7Ge0.3 deposited on SiO2,"J. of Applied Physics, Vol. 87, No. 5, pp2449~2453, March, 2000.[SCI]  [DOWNLOAD]
  177. In-Ho Nam, Sung-In Hong, Jae Sung Sim, Byung-Gook Park, Jong Duk Lee, "Annealing Effects on QBD of Ultra-Thin Gate Oxide Grown on Nitrogen Implanted Silicon ," J. of KITE, Vol.37-SD, pp.6-13, March, 2000
  178. Yun Chan Kang, Jeong Su Choi, Seung Bin Park, Sung Hee Cho, Jae Soo Yoo and Jong Duk Lee, "Preparation of Spherical YAG:Tb Phosphor by Spray Pyrolysis Using Filter Expansion Aerosol Generator," Journal of SID, 1999.
  179. In Ho Nam, Sung In Hong, Jae Sung Sim, Byung Gook Park and Jong Duk Lee, "Ultra-Thin Gate Oxide Grownon Nitrogen Implanted Silicon," JKPS, Vol. 35, pp S788~S790, December, 1999.[SCI]  [DOWNLOAD]
  180. Dong Hyuk Chae, Dae Hwan Kim, Yong Jae Lee, Chang Hyun Kwak, Jong Duk Lee ,Byung Gook Park, Tae Sik Yoon, Jang Yeon Kwon, Ki Bum Kim, Kyoung Ryol Kim, Noe Jung Park, Hyun Sik Yoon and Seok Jae Jeong, "Nanocrystal Memory Cell Using High-Density Si 0.73Ge 0.27 Quantum Dot Array," JKPS, Vol. 35, pp. S995~S998, December, 1999.[SCI]  [DOWNLOAD]
  181. Suk Kang Sung, Young jin Choi, Jong Duk Lee and Byung Gook Park, "Realization of Ultra-Fine Lines Using Sidewall Structures and Their Application to nMOSFETs," JKPS, Vol. 35,pp S693~S696,December,1999.[SCI]  [DOWNLOAD]
  182. Jong Duk Lee, Nam Seog Kim, Il Hwan Kim and Byung Gook Park, "Fabrication of Silicon Field Emitter Arrays Combined with HVTFT at Low Temperature," JKPS, Vol. 35, pp. S1102~S1105, December, 1999.[SCI]  [DOWNLOAD]
  183. Yeon Chel Heo, Sang Tae Chung, Chan Kwang Park, Jeong Ho Lee, Yo Hwan Koh, Byung Gook Park and Jong Duk Lee, "Dependence of Contact Resistance on Substrate Doping and Impact of Mixed Ion Implantation," Jpn. J. Appl. Phys., Vol. 38, pp. 5783~5787, Oct., 1999.[SCI]
  184. Sang Jik Kwon, Kun Jo Hong, Tae Hee Cho, Jong Duk Lee, Chang Woo Oh and Yong Bum Kwon, "0.7 inch FED Panel system build-up by using proper sealing process," J. of the Korean Vacuum Society, Vol. 3, No. 1, pp. 85~89, April, 1999.
  185. Seung Ho Kwon, Sung Hee Cho, Jae Soo Yoo and Jong Duk Lee, "Screening of spherical phosphors by electrophoretic deposition for full-color field emission display application," J. of the Korean Vacuum Society, Vol. 3, No. 1, pp. 79-84, April, 1999.
  186. Jong Duk Lee, Jung Hyun Nam and Il Hwan Kim, "Design of MOSFET-Controlled FED integrated with driver circuits," J. of the Korean Vacuum Society, Vol. 3, No. 1, pp. 66-73, April, 1999.
  187. Jong Duk Lee, Byung Chang Shim, Hyung Soo Uh, Byung Gook Park, "Surface Morphology and I-V Characteristics of Single-Crystal, Polycrystalline, and Amorphous Silicon FEA's," IEEE Electron Device Letters, Vol 20, No 5, pp. 215-218, May, 1999.[SCI]  [DOWNLOAD]
  188. S.C. Ha, D.H. Kang, K.B. Kim, S.H. Min, I.H. Kim, J.D. Lee, "Fabrication of gated diamond field emitter array using a selective diamond growth process," Thin Solid Films, Vol. 341, pp. 216-220, March, 1999. [SCI]  
  189. Jong Duk Lee, and Sang Jik Kwon, "The Technology and Prospect of FED(Field Emission Display)," The Magazine of the IEEK, Vol 26, No. 2, pp. 71-87, 1999.
  190. Sang Won Kang, Jae Soo Yoo, and Jong Duk Lee, "Photolithographic Patterning of Phosphor Screens by Electrophoretic Deposition for Field Emission Display Application," Journal of Vacuum Science and Technology B, Vol. 16, No. 5, pp.2891-2893, Sep/Oct, 1998.[SCI]
  191. Sang Jik Kwon, Kyung Sun Ryu, Tae Hee Cho, Young Hwa Shin, and Jong Duk Lee, "Fabrication of FED Panel and Vacuum Evaluation Inside the Panel," J. Korean Physical Society, Vol. 33, pp. s440-s443, November, 1998.[SCI]
  192. Jong Duk Lee, Byung Chang Shim, Euo Sik Cho and Byung Gook Park, "Surface Morphology and I-V Characteristics of Single Crystal, Polycrystalline and Amorphous Silicon FEAs," J. Korean Physical Society, Vol. 33, pp. s401-s405, November, 1998.[SCI]
  193. Jong Duk Lee, Hyung Soo Uh and Byung Gook Park, "A Study on the Surface Structure and Electron Emission Characteristics of Gated Polycide Field Emitter Arrays", J. Korean Physical Society, Vol. 33, pp. s396-s400, November, 1998.[SCI]
  194. Dae Hwan Kim, Dong Hyuk Chae, Jong Duk Lee and Byung Gook Park, "Silicon Single Electyron Transistors with a Dual Gate Structure," J. Korean Physical Society, Vol. 33, pp. s278-s282, November, 1998.[SCI]
  195. Yeong Taek Lee, Dong Soo Woo, Jong Duk Lee and Byung Gook Park, "Impact of Incomplete Ionization on Indium Doped Buried Channel pMOSFETs", J. Korean Physical Society, Vol. 33, pp. s200-s203, November, 1998.[SCI]
  196. Jong Tae Park, Dae Nam Ha, Seoung Jun Jang, Chong Gun Yu, Byung Gook Park, and Jong Duk Lee, "Hot Carrier Effects in Extreme Submicrometer CMOS," Journal of Electrical Engineering and Information Science, Vol. 3, No. 3, pp.521-526, Aug., 1998.
  197. Shin-Sung Kim, Sung Hee Cho, Jae Soo Yoo, Sung Ho Jo, and Jong Duk Lee, "Resistivity effect of ZnGa2O4:Mn phosphor screen on cathodoluminescence characteristics of field emission display," Journal of Vacuum Science and Technology B, Vol. 16, No. 4, pp.2086-2090, Jul/Aug, 1998.[SCI]
  198. Hyung Soo Uh, Byung Gook Park, and Jong Duk Lee, "Improvement of Electron Emission Efficiency and Stability by Surface Application of Molybdenum Silicide onto Gated Poly-Si Field Emitters," IEEE-ED Letters, Vol. 19, No. 5, pp.167-170, May, 1998.[SCI]
  199. Hyouk Man Kwon, Yeong-Taek Lee, Jong Duk Lee, and Jong Duk Lee, "Dual-Gate Surface Channel 0.1 um CMOSFETs," Journal of Electrical Engineering and Information Science, Vol. 3, No. 2, pp.261-266, April, 1998.
  200. Sang Jik Kwon, Young Hwa Shin, Dean M. Aslam, and Jong Duk Lee, "Field emission properties of the polycrystalline diamond film prepared by microwave-assisted plasma chemical vapor deposition," Journal of Vacuum Science and Technology B, Vol. 16, No. 2, pp. 712-715, Mar/Apr 1998.[SCI]
  201. Chang Woo Oh, Chun Gyoo Lee, Byung Gook Park, Jong Duk Lee, and Jong Ho Lee, "Fabrication of metal field emitter arrays for low voltage and high current operation," Journal of Vacuum Science and Technology B, Vol. 16, No. 2, pp. 807-810, Mar/Apr 1998.[SCI]
  202. Hyung Soo Uh, Byung Gook Park, and Jong Duk Lee, "Surface application of molybdenum silicide onto gated poly-Si emitters for enhanced field emission performance," Journal of Vacuum Science and Technology B, Vol. 16, No. 2, pp. 866-870, Mar/Apr 1998.[SCI]
  203. Jung Hyun Nam, Hyung Soo Uh, Jong Duk Lee, Jeong Don Ihm, Yeo Hwan Kim, and Kyu Man Choi, "Characteristics and circuit model of a field emission triode," Journal of Vacuum Science and Technology B, Vol. 16, No. 2, pp. 916-919, Mar/Apr 1998.[SCI]
  204. Jaehoon Jung, Byoungho Lee, and Jong Duk Lee, "Effective three-dimensional simulation of field emitter array and its optimal design methodology using an evolution strategy," Journal of Vacuum Science and Technology B, Vol. 16, No. 2, pp. 920-922, Mar/Apr 1998.[SCI]
  205. Sung Hee Cho and Jae Soo Yoo and Jong Duk Lee, "A New Synthetic Method to Prepare Spherical Phosphor for Emissive Screen Applications," J. Electrochem. Soc., Vol. 145, No. 3, pp.1017-1019, Mar., 1998.[SCI]
  206. Sang Won Kang, Jae Soo Yoo and Jong Duk Lee, "Effects of SnO2 on the Phosphor Screen Behaviors under Low Energy Electron Excitation," J. Electrochem. Soc., Vol. 145, No. 2, pp.648-651, Feb., 1998.[SCI]
  207. Jong Duk Lee, "The Prospects of FPD Market and Technology," Optical Science and Technology, Vol. 2, No. 1, Jan., 1998.
  208. Jeong-Young Park, Jared D. Lera, M. A. Yakshin, S. S. Choi, Y. Lee, K. J. Chun, J. D. Lee, D. Jeon and Young Kuk, "Fabrication of Multiple microcolumn array combined with field emission array," Journal of Vacuum Science and Technology B, Vol. 15, No. 6, pp2749-2753, Nov/Dec 1997.[SCI]
  209. Jeongho Lyu, Byung-Gook Park, Kukjin Chun, and Jong Duk Lee, "Reduction of Hot-Carrier Generation in 0.1- um Recessed Channel nMOSFET with Laterally Graded Channel Doping Profile," IEEE-ED Letters, pp.535-537, Vol. 18, No. 11, Nov., 1997.[SCI]
  210. Chang-Woo Oh, Chun-Gyoo Lee, Byung-Gook Park, Jong-Duk Lee, and Jong-Ho Lee, "Fabrication of Novel Metal Field Emitter Arrays(FEAs) Using Isotropic Silicon Etching and Oxidation," Journal of Electrical Engineering and Information Science, Vol. 2, No. 6, pp.212-216, 1997.
  211. Yun Chan Kang, Jeong Su Choi, Seung Bin Park, Sung Hee Cho, Jae Soo Yoo and Jong Duk Lee, "Preparation of CaTiO3:Pr Phosphor by Spray Pyrolysis Using Filter Expansion Aerosol Generator," J. Aerosol Sci., Vol. 28, Suppl. 1, pp.S541-S542, 1997.[SCI]
  212. Jung-Hyun Nam, Jeong-Don Ihm, Jong-Duk Lee, Yeo-Hwan Kim, and Kyu-Man Choi, "Charactericstics and Circuit Model of a Field Emission Triode," Journal of Electrical Engineering and Information Science, Vol. 2, No. 5, pp.129-133, 1997.
  213. Jong T. Park, Dae N. Ha, Chong G. Yu, Byung G. Park and Jong D. Lee, "Diagnostic Technique for Projecting Gate Oxide Reliability and Device Reliability," Journal of Microelectron. Reliab., Vol. 37, No. 10/11, pp.1421-1424, 1997.[SCI]
  214. Jeongho Lyu, Byung-Gook Park, Kukjin Chun, and Jong Duk Lee, "Suppression of Short Channel Effects in 0.1 mm Si nMOSFETs with ISRC Structure," Journal of KITE, Vol. 34-D, No. 8, pp35-40, August, 1997.
  215. Jae Soo Yoo and Jong Duk Lee, "The effects of particle size and surface recombination rate on the brightness of low-voltage phosphor," J. Appl. Phys, Vol. 81, No. 6, pp2810-2813, March 1997.[SCI]
  216. Sang Won Kang, Byung Soo Jeon, Jae Soo Yoo and Jong Duk Lee, "Optical characteristics of the phosphor screen in field-emission environments," Journal of Vacuum Science and Technology B, Vol. 15, No. 2, pp520-523, Mar/Apr 1997.[SCI]
  217. Hyung Soo Uh, Sang Jik Kwon and Jong Duk Lee, "Process design and emission properties of gated n+ polycrystalline silicon field emitter arrays for flat-panel display applications," Journal of Vacuum Science and Technology B, Vol. 15, No. 2, pp472-476, Mar/Apr 1997.[SCI]
  218. Il Hwan Kim, Chun Gyoo Lee, Yeo Hwan Kim, Byung Gook Park and Jong Duk Lee, "Fabrication of metal field emitter arrays on polycrystalline silicon," Journal of Vacuum Science and Technology B, Vol. 15, No. 2, pp468-471, Mar/Apr 1997.[SCI]
  219. Chun Gyoo Lee, Byung Gook Park and Jong Duk Lee, "Fabrication and characterization of volcano-shaped field emitters surrounded by planar gates," Journal of Vacuum Science and Technology B, Vol. 15, No. 2, pp464-467, Mar/Apr 1997.[SCI]
  220. Jaehoon Jung, Yeong-hoon Kim, Byoungho Lee, and Jong Duk Lee, "3-Dimensional Simulation of Field Emitter Array," J. of KITE, Vol. 34-D, No. 4, pp100-105, April 1997.
  221. Yeong-Taek Lee, Ki-Whan Song, Byung-Gook Park and Jong Duk Lee, "Indium Doped nMOSFETs and Buried Channel pMOSFETs with n+ Polysilicon Gate," Jpn. J. Appl. Phys., Vol. 36, pp1341-1345, March 1997.[SCI]
  222. Jong Duk Lee, "FPD Market and Technology Trends," SEMI, Channel Magazine, Feb./Mar., 1997.
  223. Ki Whan Song, Byung-Gook Park, and Jong Duk Lee, "0.15um Gate Length nMOSFETs with Indium Implanted Channel," KITE Journal of Electronics Engineering, Vol. 7, No. 4, pp. 18-23, Dec., 1996.
  224. Kyung Nam Park, Young Jin Choi, Byung Gook Park, and Jong Duk Lee, "The Dependence of Hot-Electron Immunity of Ultra-Thin Gate Oxide on the Amount of TCA Incorporation," KITE Journal of Electronics Engineering, Vol. 7, No. 4, pp. 13-17, Dec., 1996.
  225. Byung-Soo Jeon, Jae Soo Yoo, and Jong Duk Lee, "Electrophoretic Deposition of ZnO:Zn Phosphor for Field Emission Display Applications," Journal of Electrochem. Soc., Vol. 143, No. 12, pp. 3923-3927, Dec., 1996.[SCI]
  226. Jong Tae Park, Sung Jun Jang, Chong Gun Yu, Byung Gook Park, and Jong Duk Lee, "New Experimental Findings on Hot Carrier Effects in Deep Submicrometer Surface Channel PMOS," Journal of Microelectron. Reliab., Vol. 36, No. 11/12, pp. 1659-1662, Nov/Dec., 1996.[SCI]
  227. Sung Hee Cho, Jae Soo Yoo, and Jong Duk Lee, "Synthesis and low-Voltage Characteristics of CaTiO3:Pr Luminescent Powders," Journal of Electrochem. Soc., Vol. 143, No. 10, pp. L231-234, Oct., 1996.[SCI]
  228. Young Jin Choi, Byung-Gook Park, and Jong Duk Lee, "Characteristics of 0.1 nMOSFETs with Different Channel Doping and Gate Oxide Thickness," KITE Journal of Electronics Engineering, Vol. 7, No. 3, pp. 28-33, Sep., 1996.
  229. Youngjoo Yee, Kukjin Chun, Jong Duk Lee, and Chang-Jin Kim, "Polysilicon Surface-Modification Technique to Reduce Sticking of Microstructures," Sensors and Actuators A-Physical, Vol.52, pp.145-150, 1996.[SCI]
  230. Ho Ryun Chung, Sang Jik Kwon, and Jong Duk Lee, "Fabrication of the Silicon Field Emitter Arrays with H2O Densified Oxide as a Gate Insulator," J. of KITE, Vol.33-A, No.7, pp.1369-1373, Jun., 1996.
  231. Taeweon Suh, Youngmog Ham, Kukjin Chun, and Jong Duk Lee, "3-D Resist Profile Simulation using String Model on E-beam Lithography," J. of KITE, Vol.33-A, No.6, pp.1094-1100, Jun., 1996.
  232. Chun Gyoo Lee, Ho Young Ahn, Byung Gook Park, and Jong Duk Lee, "New Approach to Manufacturing Field Emitter Arrays with Sub-Half-Micron Gate Apertures," Journ. of Vacuum Science and Technology B, Vol. 14, No. 3, pp.1966-1969, May/Jun., 1996.[SCI]
  233. Donghwan Kim, Sang Jik Kwon, and Jong Duk Lee, "Fabrication of Silicon Field Emitters by Forming Porous Silicon," Journ. of Vacuum Science and Technology B, Vol. 14, No. 3, pp.1906-1909, May/Jun., 1996.[SCI]
  234. Sung Ho Jo, Byung Gook Park, and Jong Duk Lee, "Analysis of Field Emission Characteristics of Hydrogen-Adsorbed Silicon Surface," Applied Physics Letter, Vol.68, No.16, pp.2234-2236, Apr., 1996.[SCI]
  235. Sung J. Jang, Yong T. Kim, Chong K. Yu, Jong T. Park, Byung K. Park, and Jong D. Lee, "Hot Carrier Effects and Device Degradation in Deep Submicrometer PMOSFET," J. of KITE, Vol.33-A, No.4, pp.129-135, Apr., 1996.
  236. Jeongho Lyu, Byung-Gook Park, Kukjin Chun, and Jong Duk Lee, "A Novel 0.1 MOSFET Structure with Inverted Sidewall and Recessed Channel," IEEE Electron Device Letters, Vol.17, No.4, pp.157-159, Apr., 1996.[SCI]
  237. Chun Gyoo Lee, Byung Gook Park, and Jong Duk Lee, "A New Fabrication Process of Field Emitter Arrays with Submicron Gate Apertures Using Local Oxidation of Silicon," IEEE Electron Device Letters, Vol.17, No.3, pp.115-117, Mar., 1996.[SCI]
  238. Jong-Ho Lee, Won-Gu Kang, Jong-Son Lyu, and Jong Duk Lee, "Modeling of the Critical Current Density of Bipolar Transistor with Retrograde Collector Doping Profile," IEEE Electron Device Letters, Vol.17, No.3, pp.109-111, Mar., 1996.[SCI]
  239. H. S. Uh, S. J. Kwon, and J. D. Lee, "A Novel Fabrication Process of a Silicon Field Emitter Array with Thermal Oxide as a Gate Insulator," IEEE ED-Letter, Vol.16, No.11, pp.488-490, Nov., 1995.[SCI]
  240. Yong T. Kim, Deok K. Kim, Chong K. Yu, Jong T. Park, Byung K. Park, and Jong Duk Lee, "PMOSFET Degradation due to Bidirectional Hot Carrier Stress," J. of KITE, Vol.32-A, No.6, pp.817-824, June, 1995.
  241. Sang Jik Kwon, Yeo Hwan Kim, Young Wha Sin, Jong Joon Kim, and Jong Duk Lee, "Fabrication of deep submicron PMOSFET with the source/drain formed by the Method of As-Preamorphization through the Predeposited Amorphous Si Layer," J. of KITE, Vol.32-A, No.6, pp.809-816, June, 1995.
  242. Ho Young Ahn, Chun Gyoo Lee, and Jong Duk Lee, "Numerical Analysis on Field Emission for the Effects of the Gate Insulators," Journ. of Vacuum Science and Technology B, Vol. 13, No. 2, pp.540-544, March/April, 1995.[SCI]
  243. Sung Ho Jo, Sang Jik Kwon and Jong Duk Lee, "Fabrication and Analysis of a Silicon Tip Avalanche Cathode," Journ. of Vacuum Science and Technology B, Vol. 13, No. 2, pp.469-473, March/April, 1995.[SCI]
  244. Hyung Soo Uh and Jong Duk Lee, "New Fabrication Method of Silicon Field Emitter Arrays Using Thermal Oxidation," Journ. of Vacuum Science and Technology B, Vol. 13, No. 2, pp.456-460, March/April, 1995.[SCI]
  245. Jae Soo Yoo and Jong Duk Lee, "The Development Trends of Phosphor for FED," The Magazine of the KITE, Vol. 22, No. 3, pp. 106-114, March, 1995.
  246. Sang Jik Kwon and Jong Duk Lee, "The Prospects of FED Technology," The Magazine of the KITE, Vol. 22, No. 3, pp. 51-60, March, 1995.
  247. Jong Duk Lee, "FED Technology," Korean Physical Society-Physics & High Technology, pp.3-7, Dec., 1994.
  248. Yeon Cheol Heo, Woo-Hyeong Lee, Byung Gook Park, Young-June Park, and Jong Duk Lee, "A Study on the Scale-Down of 0.1 Surface-Channel GR-pMOSFET," J. of KITE, Vol.31-A, No.11, pp.131-137, Nov., 1994.
  249. Hyung Soo Uh, Nam Shin Park, and Jong Duk Lee, "New Fabrication Method of Silicon Field Emitter Array Using Pure Thermal Oxide," Korean Appl. Phys., Vol.7, No.4, pp.333-341, July, 1994.
  250. Yeo Hwan Kim, Sang Jik Kwon, Kuk Jin Chun, and Jong Duk Lee, "Properties of the p+ poly-Si Gate Fabricated Using the As Preamorphization Method," Japanese J. of Applied Physics, Vol.33, No.5, pp.22-27, May, 1994.[SCI]
  251. Ho Young Ahn, Chun Gyoo Lee, and Jong Duk Lee, "Numerical Analysis of Electric Field and Current for Spindt-Type Emitter," J. Korean Phys. Soc., Vol.27, No.2, pp.200-204, April, 1994.[SCI]
  252. Sang Jik Kwon, Yeo Hwan Kim, Kuk Jin Chun, and Jong Duk Lee, "As Preamorphization of the Predeposited Amorphous Si Layer for the Formation of the Silicided Ultra Shallow p+-n Junction," Japanese J. of Applied Physics, Vol.33, No.1, pp.664-667, Jan., 1994.[SCI]
  253. Youngjoo Yee, Sanggi Yu,Kukjin Chun, and Jong Duk Lee, "The Novel Capacitor Structure with Polysilicon Grain Hole for Advanced Dynamic Random Access Memory," Japanese J. of Applied Physics, Vol.33, No.1, pp.578-580, Jan., 1994.[SCI]
  254. Woo-Hyeong Lee, Young-June Park, and Jong Duk Lee, "A New Recessed Channel Metal-Oxide Semiconductor Field-Effect Transistor with Selectively Halo-Doped Channel and Deep Graded Source/Drain," Japanese J. of Applied Physics, Vol.33, No.1, pp.529-531, Jan., 1994.[SCI]
  255. Sanggi Yu, Yeo Hwan Kim, Kukjin Chun, and Jong Duk Lee, "The Fabrication of the 0.1 m NMOSFET by E-beam Lithography," J. KITE, Vol.31-A, No.1, pp.61-64, Jan., 1994.
  256. Jong Ho Lee, Young-June Park, and Jong Duk Lee, "Effect of high injection barrier(HIB) on bipolar transistor characteristics," IEEE Trans. on Electron Devices, Vol.41, No.1, pp.102-108, Jan., 1994.[SCI]
  257. Woo-Hyeong Lee, Young-June Park, and Jong Duk Lee, "A New 0.25 m Recessed Channel MOSFET with Selectively Halo-Doped Channel and Deep Graded Source/Drain," IEEE Electron Device Lett., Vol.14, No.12, Dec., 1993.[SCI]
  258. Woo-Hyeong Lee, Young-June Park and Jong Duk Lee, "A New Recessed Gate MOSFET Structure with the Graded Source/Drain," IEEE Transactions on Electron Devices, Vol.40, No.11, pp.2102-2103, Nov. 1993.[SCI]
  259. S. Yu, K. Chun and J. D. Lee, "The Honeycomb Shape Capacitor Structure for ULSI DRAM," IEEE ED-Letter, Vol.14, No.8, pp.369-371, Aug., 1993.[SCI]
  260. Jong Ho Lee, Young June Park, Chang Soo Heo and Jong Duk Lee, "Self-Aligned n+-p Polysilicon Junction Structure Using the Process Oxidation," KITE, Vol.30-A, No.6, pp.38-48, June, 1993.
  261. Jong Duk Lee, Historical Review of Semiconductor Technology, Engineering College of SNU, No.2, pp.40-41, 1993.
  262. S. H. Jo, Y. Heo and J. D. Lee, "A Surface Generation Velocity Measurement Technique Using the Buried Channel MOS Structure," KITE, vol.29-A, no.7, pp.56-63, July 1992.
  263. S. B. Lee, S. G. Yu, Y. H. Kim, K. J. Chun and Jong Duk Lee, "A Study of the Electron-Beam Direct Writing Technique for MIX-AND-MATCH with Stepper," KITE, vol.29-A, no.5, pp.61-64, May 1992.
  264. S. M. Cho, J. D. Lee and H. H. Lee, "Specific Resistivity of Ohmic Contacts to n-type Direct Band-Gap III-V Compound Semiconductors," J. Applied Phys., 70(1), pp.282-287, July 1991.[SCI]
  265. Jong Ho Lee, Young-june Park and Jong Duk Lee, "Optimization of High Injection Barrier for Bipolar Transistor in BiCMOS Logic," KITE, Vol.2, No.1, pp.41-51, June 1991.
  266. Sang-Jik Kwon and Jong Duk Lee, "Shallow p+-n Junction Formation by the Optimization of As-preamorphization Conditions," J. Electrochem. Soc., Vol.138, No.3, pp.867-870, March 1991.[SCI]
  267. Jong Ho Lee, Young-june Park and Jong Duk Lee, "Under Field Oxide Dopant Enhancement (UFDE) for CMOS and BiCMOS Technology," Japanese J. of Applied Physics, Vol.29, No.12, pp.L2272-L2275, Dec. 1990.[SCI]
  268. Sang-Jik Kwon, Hyeong-Joon Kim and Jong Duk Lee, "As+-Preamorphization Method for Shallow p+-n Junction Formation," Japanese J. of Applied Physics, Vol.29, No.12, pp.L2326-L2328, Dec. 1990.[SCI]
  269. Sang Sik Park, Chang Bae Park, and Jong Duk Lee, "A MOS Image Sensor with 384x485 Pixels," J. of the KITE, Vol.25, No.11, pp.185-191, Nov. 1988.
  270. Sang Sik Park and Jong Duk Lee, "Analysis and Measurement of the n+pn Image Cell Characteristics," J. of Engineering Research, Seoul National Univ., Vol.20, No.2, pp.121-127, Oct. 1988.
  271. Hyung Cheol Shin, Hong Shick Min, and Jong Duk Lee, "Blooming Suppression of an npn MOS Image Sensor," KITE, Vol.25, No.12, pp.62-66, April 1988.
  272. ISRC-SNU Korea Industrial Research Institutes Technology Management, No. 49, Sept. 1987.
  273. Ki Young Lee, Kyu Shik Hong, Hong Shick Min, and Jong Duk Lee, "Study on Plasma Anodization," Report of the Research Institute of Industrial Science, SNU, Vol.10, No.1, June 1987.
  274. Yong Bum Kim, Sang Sik Park, Chel Sik Cho, and Jong Duk Lee, "Design of Dynamic NMOS Shift Register Used for Image Sensor," KITE, Vol.24, No.3, pp.90-96, May 1987.
  275. Dae Won Kim, Joo Yeol Oh, Chang Bae Park, Ki Woong Whang, and Jong Duk Lee, "An Image Pick-up Tube Using Boron Doped Hydrogenated Amorphous Silicon Photoconductor," SNU J. Engineering Research, Vol.19, No.1, pp.23-30, April 1987.
  276. Ki Woong Whang, Jong Duk Lee, and Jung Ho Kim, "Characteristics of the Oxygen Plasma and Its Application to Photo Resist Stripping," J. of KIEE, Vol.24, No.1, pp.73-78, Jan. 1987.
  277. Ki Woong Whang, Young Woon Seo, Sung Chul Kim, Ki Duk Kwon, and Jong Duk Lee, "Fabrication and Characterization of a Dichroic Filter," New Physics (Korean Physical Society), Vol.26, No.5, pp.336-341, Oct. 1986.
  278. Gyo Young Jin, Jong Duk Lee, Heung Joon Park, and Choong Ki Kim, "Image Sensing Device," KIEE Review, Vol.13, No.1, pp.1-15, Feb. 1986.
  279. Byung Hoon Min, Jong Duk Lee, and Chung Han Lee, "Measurement of Work Function of Al Using MOS C-V Curves," SNU Engineering Report, Vol.17, No.1, April 1985.
  280. Jong In Shim, Byung Soo Chang, Jong Duk Lee, and Chung Han Lee, "Properties of PECVD Films for IC Fabrication," SNU Engineering Report, Vol.17, No.1, April 1985.
  281. Jong Duk Lee, Won Chan Kim, Hong Shick Min, and Chung Han Lee, "Diffusion Characterization of Doped Oxide and Nitride Film," J. of KIEE, Vol.22, No.2, March 1985.
  282. "Applications and Prospects of a-Si," KIEE, Vol.33, No.12, Dec. 1984.
  283. "Fabrication and Characteristics of P+N and P+NN+ Junction Silicon Solar Cell," J. Korea Institute of Electronics Engineers, Vol.20, No.1, Jan. 1983.
  284. "Optimization of PSG Flowing and Metallization for Step Coverage Improvement," J. Korea Institute of Electronics Engineers, Vol.19, No.6, Dec. 1982.
  285. "Temperature Dependence of the Operational Characterstics of ISFET," Paper Collection for Prof. Jong Rack Choi's Celebration Published in Kyungpook National University, pp.305-314, Jan. 1982.
  286. "High Efficiency Silicon Solar Cell (II) - Computer Modeling on Diffused Silicon Solar Cell," J. Korea Institute of Electronics Engineers, Vol.18, No.4, Aug. 1981.
  287. "High Efficiency Silicon Solar Cell (I) - Fabrication and Characterization of N+PP+ Cells," J. Korea Institute of Electronics Engineers, Vol.18, No.3, June 1981.
  288. "Fabrication Technology and Prospects of Solar Cell," Korea Institute of Electronics Engineers Review, Vol.6, No.4, pp.31-43, Dec. 1979.
  289. "Fabrication and Evaluation of NMOS Devices," J. Korea Institute of Electronics Engineers, Vol.16, No.4, pp.36-46, Sep. 1979.
  290. "Fe1+xV2-xO4 Spinel : Negative Resistance Characteristics of Fe1+xV2-xO4," J. Korea Institute of Electronics Engineers, Vol.14, No.3, pp.96-102, 1977.
  291. "Manufacture of Synthetic Star Ruby and Star Sapphire," J. Korea Physical Society, Vol.10, pp.15-21, 1977.
  292. "C- and Fe- (Beewax Polyethylene) PTC Thermistors," J. Korea Institute of Electronics Engineers, Vol.13, No.4, pp.106-111, 1976.
  293. "Mossbauer Study of Fe1+XV2-XO4 Spinels for the Determination of Cation Distribution and Magnetic Structure," J. Phys. Chem. Solids, Vol.37, pp.747-752, 1976. [SCI]  
  294. "Mossbauer Study of Fe57 in Co1+XV2-XO4," J. Phys. Chem. Solids, Vol. 37, pp.739-746, 1976. [SCI]  
  295. "Mossbauer Study of the Valence State and Debye Temperature of Eu in EuTiO3," J. Korean Phys. Soc., Vol.8, pp.101-105, 1975.

   Conference

 

  1. 윤장근, 박세환, 박일한, 이종덕, 박병국, "실리콘 게르마늄의 선택적 습식 식각에 대한 연구", 2009 IEEK Summer conference, Jeju, Korea, pp. 383-384, July 8-10, 2009. [DOWNLOAD]
  2. Jae Young Song, Jong Pil Kim, Sang Wan Kim, Jeong-Hoon Oh, Kyung-Chang Ryoo, Jae Hyun Park, Garam Kim, Hyun Woo Kim, Atteq Ur Rehman, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Buried-Gate Fin and Recess Channel MOSFET for Sub-30 nm DRAM Cell Transistors with High Performance and Low GIDL Current", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 51-52, June 13-14, 2009. [INTL] [DOWNLOAD]
  3. Wandong Kim, Il Han Park, Jang-Gn Yun, Jung Hoon Lee, Se-Hwan Park, Yoon Kim, Dong Hua Lee, Seongjae Cho, Doo-Hyun Kim, Gil Sung Lee, Won Bo Sim, Jong-Duk Lee, and Byung-Gook Park, "Impact of Three-dimensional Device Structures on NAND Flash Memory with Inversion Type Source and Drain", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 69-70, June 13-14, 2009. [INTL] [DOWNLOAD]
  4. Jang-Gn Yun, Il Han Park, Wandong Kim, Jong Duk Lee and Byung-Gook Park, "Word-line Double Patterning Process (WDPP) for High Density, Low Cost NAND Flash Memory", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 73-74, June 13-14, 2009. [INTL] [DOWNLOAD]
  5. Sang Hyuk Park, Dong-Seup Lee, Sangwoo Kang, Jung Han Lee, Hong-Seon Yang, Kwon-Chil Kang, Joung-Eob Lee, Jong Duk Lee, and Byung-Gook Park, "Fabrication and Operation Characteristics of Recessed-Channel Dual-Gate Single-Electron Transistors", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 97-98, June 13-14, 2009. [INTL] [DOWNLOAD]
  6. Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Gil Sung Lee, Doo-Hyun Kim, Yoon Kim, Se-Hwan Park, Won-Bo Sim, Wandong Kim, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Multi-Bit Gated-Diode Flash Memory", The 16th Korean Conference on Semiconductors, Deajeon, Korea, pp. 300-301, Feb. 18-20, 2009.  [DOWNLOAD]
  7. Seongjae Cho, Yoon Kim, Se Hwan Park, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "Highly Scalable Three-Dimensional Two-Bit NAND-Type Flash Memory Device with Additional Cut-off Gate", The 16th Korean Conference on Semiconductors, Deajeon, Korea, pp. 20-21, Feb. 18-20, 2009.  [DOWNLOAD]
  8. Dong-Seup Lee, Hong-Seon Yang, Kwon-Chil Kang, Joung-Eob Lee, Jung Han Lee, Sang Hyuk Park, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Oscillation Period Reduction Scheme in SET Circuit Applications", The 16th Korean Conference on Semiconductors, Deajeon, Korea, pp. 28-29, Feb. 18-20, 2009.  [DOWNLOAD]
  9. Junsoo Kim, Seungwon Yang, Jaehong Lee, Youngmin Kwon, Sung Dae Suk, Kangil Seo, Donggun Park, Byung-Gook Park, Jong Duk Lee and Hyungcheol Shin, “Room temperature carrier transport characteristics in twin silicon nanowire MOSFETs,” 한국 반도체 학술대회, Feb. 2009 [DOWNLOAD]
  10. Heesang Kim, Kyungdo Kim, Tae-Kyung Kim, Seon-Yong Cha, Sung-Joo Hong, Byung-Gook Park, Jong Duk Lee and Hyungcheol Shin, “A simple threshold voltage model for saddle-fin transistor,” 한국 반도체 학술대회, Feb. 2009 [DOWNLOAD]
  11. Jaehong Lee, Yeonam Yoon, Jung Han Choi, Byung-Gook Park, Jong Duk Lee and Hyungcheol Shin, “The modeling of metal layers and vias in RF MOSFET for accurate circuit design,” 한국 반도체 학술대회, Feb. 2009 [DOWNLOAD]
  12. Daewoong Kang, Sungnam Chang, Junghoon Lee, Ilhan Park, Seunggun Seo, Gideok Kwon, Kyungmi Bae, Inyoung Kim, Eunjung Lee, Jeong-Hyuk Choi, Byung-Gook Park, Jong Duk Lee and Hyungcheol Shin, “Improving the cell characteristics and reduction of RTS noise using field concentration effect of arch-active profile in 4 gbits NAND flash array having 60 nm design rule,” 한국 반도체 학술대회, Feb. 2009 [DOWNLOAD]
  13. Dong Hua Li, Seongjae Cho, IlHan Park, Jang-Gn Yun, Jung Hoon Lee, Gil Sung Lee, Doo-Hyun Kim, Yoon Kim, Se-Hwan Park, Won Bo Sim, Jong Duk Lee, and Byung-Gook Park, "Charge Trapping Characteristics of SONOS Capacitors with Control Gates of Different Work Functions during Program/Erase Operation," 2008 Materials Research Society, Boston, USA, A11.1, December 1-5, 2008.   [INTL]   [DOWNLOAD]
  14. Seongjae Cho, Il Han Park, JungHoon Lee, Jong Duk Lee, and Byung-Gook Park, "Program Efficiency Relying on Channel Conditions at NOR-Type Flash Memory Device Based on Silicon-on-Insulator (SOI)," 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, Hong Kong, December 8-10, 2008.   [INTL]   [DOWNLOAD]
  15. 이정업, 강권칠, 양홍선, 이정한, 이동섭, 박상혁, 신형철,이종덕, 박병국, "DG-SET 성능 향상을 위한 공정 방법," 2008 IEEK Fall Conference, Seoul, Korea, pp.391-392, November 29, 2008.   [DOWNLOAD]
  16. 윤장근, 박일한, 조성재, 이정훈, 이길성, 김두현, 김윤, 이동화, 박세환, 심원보, 김완동, 신형철,이종덕, 박병국, "적층된 수직 채널 NOR 플래시 메모리의 비선택 비트라인 전위 부양 효과," 2008 IEEK Fall Conference, Seoul, Korea, pp.389-390, November 29, 2008.   [DOWNLOAD]
  17. 조성재, 윤장근, 김윤, 이동화, 이종덕, 박병국, "채널 길이와 도핑 농도에 따른 낸드 플래시 메모리 소자의 결합비 의존성 연구," 2008 IEEK Fall Conference, Seoul, Korea, pp.381-382, November 29, 2008.   [DOWNLOAD]
  18. Keum-Dong Jung, Yoo Chul Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, “A New I-V Equation for Thin Film Transistors and Its Parameter Extraction Method,” 2008 International Meeting on Information Display, pp.201-204, Ilsan, Korea, October 13-17, 2008. [INTL]   [DOWNLOAD]
  19. Jae Young Song, Jong Pil Kim,Sang Wan Kim, Jae Hyun Park, Ga Ram Kim, Jong Duk Lee and Byung-Gook Park, "Design Consideration for Source/Drain and LDD Junction of FiReFET," The 2nd IEEE Nanotechnology Materials and Devices Conference, Kyoto, Japan, pp.150, October 20-22, 2008.   [INTL]   [DOWNLOAD]
  20. Jong Pil Kim, Jae Young Song,Sang Wan Kim, Han Ki Chung, Jae Hyun Park, Hee Sauk Jhon, Ga Ram Kim, Hyungcheol Shin, Jong Duk Lee and Byung-Gook Park, "High Performance RF Characteristics of Asymmetric MOSFETs," The 2nd IEEE Nanotechnology Materials and Devices Conference, Kyoto, Japan, pp.56, October 20-22, 2008.   [INTL]   [DOWNLOAD]
  21. Seongjae Cho, Yoon Kim, Se HwanPark, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Design Considerations for Gated Twin-Bit (GTB) Nonvolatile Memory Device Regarding Leakage Current," The 2nd IEEE Nanotechnology Materials and Devices Conference, Kyoto, Japan, pp.208, October 20-22, 2008.   [INTL]   [DOWNLOAD]
  22. Jang-Gn Yun, Il Han Park,Seongjae Cho, Jung Hoon Lee, Dong Hua Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Se-Hwan Park, Won Bo Sim, Wandong Kim, Jong Duk Lee and Byung-Gook Park, "Stacked Vertical Channel (SVC) NOR Flash Memory," The 2nd IEEE Nanotechnology Materials and Devices Conference, Kyoto, Japan, pp.151, October 20-22, 2008.   [INTL]   [DOWNLOAD]
  23. Junsoo Kim ; Seungwon Yang ; LeeJaehong ; 석성대 ; 서강일 ; 박동건 ; Byung-Gook Park ; Jong Duk Lee ; Hyungcheol Shin, "Investigation of mobility in twin silicon nanowire MOSFETs (TSNWFETs)", The 9th International Conference on Solid-State and Integrated-Circuit Technology, pp.0-0, Oct. 2008 [INTL]   [DOWNLOAD]
  24. Lee Jaehong ; Jun Jongwook ;Junsoo Kim ; Byung-Gook Park ; Jong Duk Lee ; Hyungcheol Shin, "Prediction of channel thermal noise in twin silicon Nanowire MOSFET (TSNWFET)", The 9th International Conference on Solid-State and Integrated-Circuit Technology, pp.0-0, Oct. 2008 [INTL]   [DOWNLOAD]
  25. Dae Woong Kang ; Seungwon Yang ;Jinho Kim ; Duckhyung Lee ; Byung-Gook Park ; Younghwan Son ; Jong Duk Lee ; Hyungcheol Shin, "Extraction of vertical, lateral locations and energies of hot-electrons-induced traps through the random telegraph noise", International Conference on Solid State Devices and Materials, pp.428-429, Sep. 2008 [INTL]   [DOWNLOAD]
  26. Sang Hyuk Park, Sangwoo Kang,Dong-Seup Lee, Jung Han Lee, Hong-Seon Yang, Kwon-Chil Kang, Joung-Eob Lee, Jong Duk Lee, and Byung-Gook Park, " Recessed Channel Dual Gate Single Electron Transistors (RCDG-SETs) for room temperature operation, " 2008 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sapporo, Japan, pp.73-76, July 9-11, 2008.   [INTL]   [DOWNLOAD]
  27. Yoon Kim, Gil-Seong Lee, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, " 3-dimensional Terraced NAND (3D TNAND) Flash Memory, " 2008 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sapporo, Japan, pp.85-88, July 9-11, 2008.   [INTL]   [DOWNLOAD]
  28. Seongjae Cho, Il Han Park, JungHoon Lee, Gil Sung Lee, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, " Design of Vertical Nonvolatile Memory Device Considering Gate-Induced Barrier Lowering (GIBL), " 2008 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sapporo, Japan, pp.95-99, July 9-11, 2008.   [INTL]   [DOWNLOAD]
  29. Yoo Chul Kim, Keum-Dong Jung,Jong Duk Lee, and Byung-Gook Park, "Charge Injection Path of Bottom-Contact Organic Thin-Film Transistors," 2008 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sapporo, Japan, pp. 125-128, July 9-11, 2008.   [INTL]   [DOWNLOAD]
  30. Dae Woong Kang, Sungnam Chang,Seungwon Yang, Eunjung Lee, Seunggun Seo, Jeong-Hyuk Choi, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Extraction of location and energies of traps in nanoscale flash memory using RTN", Silicon Nanoelectronics Workshop, pp.0-0, Jun. 2008 [INTL] [DOWNLOAD]
  31. Dae Woong Kang, Sungnam Chang,Jung Hun Lee, Il Han Park, Seunggun Seo, Gideok Kwon, Kyungmi Bae, Inyoung Kim, Eunjung Lee, Jeong-Hyuk Choi, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Improving the cell characteristics using arch-active profile in NAND flash memory having 60 nm design rule", Silicon Nanoelectronics Workshop, pp.0-0, Jun. 2008 [INTL] [DOWNLOAD]
  32. Junsoo Kim, Lee Jaehong, YoonYeonam, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Temperature dependence of effective channel length, Source/Drain resistance, and electron mobility in sub-50 nm MOSFETs", Silicon Nanoelectronics Workshop, pp.0-0, Jun. 2008 [INTL] [DOWNLOAD]
  33. Jun Jongwook, Jong Duk Lee,Byung-Gook Park, Hyungcheol Shin, "White noise characteristic of nanoscale MOSFETs in all operation regions", Silicon Nanoelectronics Workshop, pp.0-0, Jun. 2008 [INTL] [DOWNLOAD]
  34. Gil Sung Lee, Doo Hyun Kim, IlHan Park, Jung Hoon Lee, Seongjae Cho, Jang-Gn Yun, Dong Hua Li, Yoon Kim, Se Hwan Park, Won Bo Shim, Jong Duk Lee and Byung-Gook Park, " Fabrication Process of Cone SONOS Memory Structure," 2008 The 9th International Conference on Electronics, Information, and Communication, Tashkent, Uzbekistan, pp.1017-1020, June 24-27, 2008.   [INTL]   [DOWNLOAD]
  35. Jung Hoon Lee, Il Han Park,Seongjae Cho, Gil Seong Lee, Doo Hyun Kim, Jang Gn Yun, Yoon Kim, Jong Duk Lee, Byung-Gook Park, " Enhanced Program/Erase Characteristic of Arch Shaped SONOS Flash Memory," 2008 The 9th International Conference on Electronics, Information, and Communication, Tashkent, Uzbekistan, pp.1029-1032, June 24-27, 2008.   [INTL]   [DOWNLOAD]
  36. Seongjae Cho, Il Han Park,Younghwan Son, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, " Dependency of Program Efficiency on Implementation Conditions for NOR Type Silicon-on-Insulator (SOI) Flash Memory," 2008 The 9th International Conference on Electronics, Information, and Communication, Tashkent, Uzbekistan, pp.412-415, June 24-27, 2008.   [INTL]   [DOWNLOAD]
  37. 조성재, 박일한, 이정훈, 손영환, 이종덕, 신형철, 박병국, " SOI (Silicon-on-Insulator) 기반의 비휘발성 메모리 소자의 부분공핍 및 완전공핍 상태에서의 프로그램 효율," 대한전자공학회 하계종합학술대회, 평창, pp.395-396, June 18-20, 2008.   [DOWNLOAD]
  38. Yoon Kim, Jang-Gn Yun, Il HanPark, Seongjae Cho, Jung Hoon Lee, Se-Hwan Park, Dong Hua Lee, Doo-Hyun Kim, Gil Sung Lee, Won Bo Sim, Jong-Duk Lee, and Byung-Gook Park, " Locally-Separated Vertical Channel SONOS Flash Memory (LSVC SONOS) for Multi-Storage and Multi-Level Operation," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-33, June 15-16, 2008.   [INTL]   [DOWNLOAD]
  39. Kwon-Chil Kang, Hong Sun Yang,Joung-eob Lee, Jang-Gn Yun, Jung Han Lee, Dong-Seup Lee, Sang Hyuk Park, Jong Duk Lee, and Byung-Gook Park, " Room Temperature Behavior of Poly-silicon Quantum Dot Single Electron Transistors," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P1-28, June 15-16, 2008.   [INTL]   [DOWNLOAD]
  40. Seongjae Cho, Il Han Park, JungHoon Lee, Jang-Gn Yun, Doo-Hyun Kim, Gil Sung Lee, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, " Gated Twin-Bit (GTB) Nonvolatile Memory Device and Its Operation," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-20, June 15-16, 2008.   [INTL]   [DOWNLOAD]
  41. Han Ki Chung, Hoon Jeong, YeunSeung Lee, Jae Young Song, Jong Pil Kim, Sang Wan Kim, Jae Hyun Park, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, " A Capacitor-less 1T-DRAM Cell with Vertical Surrounding Gates Using Gate-Induced Drain-Leakage (GIDL) Current," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, M0345, June 15-16, 2008.   [INTL]   [DOWNLOAD]
  42. Sang Wan Kim, Jae Young Song,Jong Pil Kim, Woo Young Choi, Han Ki Chung, Jae Hyun Park, Hyoungsoo Ko, Seungbum Hong, Hongsik Park, Chulmin Park, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, " Investigation of Resistive Probes with High Sensitivity," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-15, June 15-16, 2008.   [INTL]   [DOWNLOAD]
  43. Jang-Gn Yun, Il Han Park, JungHoon Lee, Se-Hwan Park, Yoon Kim, Dong Hua Lee, Seongjae Cho, Doo-Hyun Kim, Gil Sung Lee, Won Bo Sim, Jong-Duk Lee, and Byung-Gook Park, " Vertical Channel Double Split-Gate (VCDSG) Flash Memory," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-29, June 15-16, 2008.   [INTL]   [DOWNLOAD]
  44. Dong-Seup Lee, Sangwoo Kang,Kwon-Chil Kang, Joung-Eob Lee, Hong-Seon Yang, Jung Han Lee, Sang Hyuk Park, Jung Hoon Lee, Jong-Duk Lee, Hyungcheol Shin, and Byung-Gook Park, " Fabrication and Improved Characteristics of Self-Aligned Dual-Gate Single-Electron Transistors," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P1-24, June 15-16, 2008.   [INTL]   [DOWNLOAD]
  45. Gil Sung Lee, Il Han Park,Seongjae Cho, Jang-Gn Yun, Jung Hoon Lee, Dong Hua Li, Doo Hyun Kim, Yoon Kim, Se Hwan Park, Won Bo Shim, Jong Duk Lee and Byung-Gook Park, " Memory characteristics improvement encouraged by the shape of narrow drain in cone SONOS memory structure," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-30, June 15-16, 2008.   [INTL]   [DOWNLOAD]
  46. Se Hwan Park, Il Han Park, JungHoon Lee, Jang-Gn Yun, Jong Duk Lee and Byung-Gook Park, " Design and Simulation of Folded Split Gate SONOS Memory," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-21, June 15-16, 2008.   [INTL]   [DOWNLOAD]
  47. 박일한, 조성재, 이정훈, 윤장근, 김두현, 이길성, 이동화, 박세환, 김윤, 심원보, 이종덕, 박병국, "Vertical-AND Array with Spacer Gate for High Density Flash Memories," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 411-412, Feb. 20-22, 2008.   [DOWNLOAD]
  48. Seongjae Cho, Il Han Park, JungHoon Lee, Jang-Gn Yun, Jong Duk Lee and Byung-Gook Park, "Folded NAND Flash Memory Array and Its Fabrication Method," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 463-464, Feb. 20-22, 2008.   [DOWNLOAD]
  49. 송재영, 김종필, 김상완, 정한기, 박재현, 신형철, 이종덕, 박병국, "Fin and Recess Channel MOSFET (FiReFET) for High Performance DRAM Cell," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 427-428, Feb. 20-22, 2008.   [DOWNLOAD]
  50. 김종필, 송재영, 김상완, 정한기, 박재현, 전희석, 윤여남, 신형철, 이종덕, 박병국, "RF Performance of 50-nm Self-Aligned Asymmetric MOSFET," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 633-634, Feb. 20-22, 2008.   [DOWNLOAD]
  51. 이정업, 김종필, 강상우, 양홍선, 이동섭, 박재현, 강권칠, 이정한, 신형철, 이종덕, 박병국, "Simulation of Dual Gate Single-Electron Transistor for Performance Improvement," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 159-160, Feb. 20-22, 2008.   [DOWNLOAD]
  52. Gil Sung Lee, Jung Hoon Lee, IlHan Park, Seong-Jae Cho, Jang-Gn Yun, Doo Hyun Kim, Dong Hua Li, Yoon Kim, Se Hwan Park, Won Bo Sim, Jong Duk Lee and Byung-Gook Park, "Fabrication of Cone SONOS Memory for Better Program/Erase Characteristics," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 55-56, Feb. 20-22, 2008.   [DOWNLOAD]
  53. Han Ki Chung, Yeun Seung Lee,Hoon Jeong, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "A Capacitor-less 1T-DRAM Cell with Vertical Double Gates Using Gate-Induced Drain-Leakage (GIDL) Current for High Sensing Margin," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 413-414, Feb. 20-22, 2008.   [DOWNLOAD]
  54. Se Hwan Park, Il Han Park, JungHoon Lee, Jang-Gn Yun, SeongJae Cho, Dong Hua Li, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Jong Duk Lee, Byung-Gook Park, "Design and Simulation of Folded Split Gate SONOS Memory," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 437-438, Feb. 20-22, 2008.   [DOWNLOAD]
  55. Keum-Dong Jung, Yoo Chul Kim,Byeong-Ju Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "I-V equation for the linear region operation of thin-film transistors," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 839-840, Feb. 20-22, 2008.  [DOWNLOAD]
  56. Jang-Gn Yun, Il Han Park,Seongjae Cho, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Dong Hua Lee, Se-Hwan Park, Won Bo Sim, Jong-Duk Lee, and Byung-Gook Park, "Double-Recessed channel (DRC) flash memory," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 49-50, Feb. 20-22, 2008.  [DOWNLOAD]
  57. Junsoo Kim, Jaehong Lee, YeonamYoon, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Extraction of effective carrier velocity and observation of velocity overshoot in sub-40 nm MOSFETs", The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp.627-628, Feb. 20-22, 2008 [DOWNLOAD]
  58. Younghwan Son, Seungwon Yang,Bongchan Kim, Jinho Kim, Chang-Rok Moon, Duckhyung Lee, Jong Duk Lee, Byung-Gook Park, Hyungcheol Shin, "Extraction of interface states energy profile by using high frequency charge pumping technique in pure and remote plasma nitrided oxides", The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp.631-632, Feb. 20-22, 2008 [DOWNLOAD]
  59. Yeonam Yoon, Jongwook Jeon,Jaehong Lee, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "RF modeling of ultra-short-channel MOSFETs in subthreshold region", The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp.399-400, Feb. 20-22, 2008 [DOWNLOAD]
  60. Jaehong Lee, Jiwon Chang, JunsooKim, Juhwan Jung, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Silicon resistive probe with improved resolution", The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp.781-782, Feb. 20-22, 2008 [DOWNLOAD]
  61. Dae Woong Kang, Seungwon Yang,Hochul Lee, Bongchan Kim, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "The drain voltage dependence of RTS noise in flash memory having the floating gate", The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp.147-148, Feb. 20-22, 2008 [DOWNLOAD]
  62. Keum-Dong Jung, Byeong-Ju Kim, Yoo Chul Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "A Novel Gated Transmission Line Method for Organic Thin Film Transistors," 2007 International Semiconductor Device Research Symposium, FA4-04, Maryland, USA, December 12-14, 2007.[INTL]  [DOWNLOAD]
  63. Il Han Park, Seongjae Cho, Jung Hun Lee, Gil Seong Lee, Doo-Hyung Kim, Jang-Gn Yoon, Yoon Kim, Sangwoo Kang, Il Hwan Cho, Daewoong Kang, Jong-Duk Lee, and Byung-Gook Park, "Vertical AND (V-AND) Array: High Density, High Speed, and Reliable Flash Array," 2007 International Semiconductor Device Research Symposium, Maryland, USA, December 12-14, 2007. [INTL]  [DOWNLOAD]
  64. Kwon-Chil Kang, Sangwoo Kang, Hong Sun Yang, Seung-hwan Song, Jinho Kim, Jong-Duk Lee, and Byung-Gook Park, "Poly-silicon Quantum Dot Single Electron Transistors," 2007 International Semiconductor Device Research Symposium, Maryland, USA, December 12-14, 2007. [INTL]  [DOWNLOAD]
  65. Jang-Gn Yun, Yoon Kim, Il Han Park, Seongjae Cho, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Dong Hwa Lee, Se Hwan Park, Wonbo Sim, Jong-Duk Lee, and Byung-Gook Park, "Fin Flash Memory Cells with Separated Dobule Gates ," 2007 International Semiconductor Device Research Symposium, Maryland, USA, December 12-14, 2007. [INTL]  [DOWNLOAD]
  66. Seongjae Cho, Il Han Park, Jong-Duk Lee, and Byung-Gook Park, "Negative Read Biasing Effects for the Reliable Operation of NOR Type Floating Gate Flash Memory Devices," 2007 International Semiconductor Device Research Symposium, Maryland, USA, December 12-14, 2007. [INTL]  [DOWNLOAD]
  67. Jae Young Song, Jong Pil Kim, Sang Wan Kim, Han Ki Jung, Jae Hyun Park, Jong-Duk Lee, and Byung-Gook Park, "Fin and Recess Channel MOSFET (FiReFET) for Performance Enhancement of Sub-50 nm DRAM Cell," 2007 International Semiconductor Device Research Symposium, Maryland, USA, December 12-14, 2007. [INTL]  [DOWNLOAD]
  68. [Invited] Jong Duk Lee, "Display Technology - The Korean Experience," 2007 IEEE Regional Symposium on Microelectronics, pp.A12, Penang, Malaysia, December 3-6, 2007.[INTL]  [DOWNLOAD]
  69. 김윤, 윤장근, 박일한, 조성재, 이정훈, 이길성, 김두현, 이동화, 심원보, 신형철, 이종덕, 박병국, "수직 채널을 갖는 4-비트 SONOS 노어 플래시 메모리," 2007 IEEK Fall Conference, pp.441-442, Seoul, Korea, November 24, 2007.  [DOWNLOAD]
  70. 조성재, 박일한, 이정훈, 윤장근, 김두현, 이길성, 이동화, 심원보, 신형철, 이종덕, 박병국, "SOI 기판 상에 구현된 플래시 메모리의 구현 조건에 대한 프로그램 동작 효율의 의존성," 2007 IEEK Fall Conference, pp.439-440, Seoul, Korea, November 24, 2007.  [DOWNLOAD]
  71. 박세환, 박일한, 조성재, 윤장근, 이정훈, 이동화, 김두현, 이길성, 이종덕, 박병국, "2-bit/cell Foled Split Gate Flash Memory의 제작 방법," 2007 IEEK Fall Conference, pp.435-436, Seoul, Korea, November 24, 2007.  [DOWNLOAD]
  72. 윤장근, 박일한, 조성재, 이정훈, 김두현, 이길성, 김윤, 이동화, 박세환, 심원보, 이종덕, 박병국, "수직 분할 게이트 구조의 2-비트 리세스 채널 SONOS 메모리," 2007 IEEK Fall Conference, pp.345-346, Seoul, Korea, November 24, 2007.  [DOWNLOAD]
  73. 박일한, 이정훈, 윤장근, 조성재, 김두현, 이길성, 이동화, 박세환, 김윤, 이종덕, 박병국, "20 nm 급 소자 제작을 위한 sidewall spacer patterning 공정," 2007 IEEK Fall Conference, pp.335-336, Seoul, Korea, November 24, 2007.  [DOWNLOAD]
  74. Keum-Dong Jung, Yoo Chul Kim, Byeong-Ju Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Effects of the Gate-Source Overlap Region of the Staggered Thin-Film Transistors on the Uniformity," 2007 IEEK Fall Conference, pp.343-344, Seoul, Korea, November 24, 2007.   [DOWNLOAD]
  75. Keum-Dong Jung, Yeonam Yun, Hyungcheol Shin, Byung-Gook Park, and Jong Duk Lee, "Complete Quasi-Static Modeling of Accumulation Mode MOSFETs," 2007 IEEK Fall Conference, pp.492-493, Seoul, Korea, November 24, 2007.   [DOWNLOAD]
  76. Byeong-Ju Kim, Keum-Dong Jung, Yoo Chul Kim, Byung-Gook Park, and Jong Duk Lee, "Low Hysteresis Organic Thin Film Transistors using PVP Gate Dielectric," 2007 IEEK Fall Conference, pp.433-434, Seoul, Korea, November 24, 2007.   [DOWNLOAD]
  77. Yoo Chul Kim, Byeong-Ju Kim, Keum-Dong Jung, Jong Duk Lee, and Byung-Gook Park"A New Threshold Voltage and Mobility Extraction Method for Organic Thin-Film Transistors," 2007 IEEK Fall Conference, pp.429-430, Seoul, Korea, November 24, 2007.   [DOWNLOAD]
  78. Sangwoo Kang, Dae-Hwan Kim, Il-Han Park, Jin-Ho Kim, Joung-eob Lee, Jong-Duk Lee, Byung-Gook Park, "Self-Aligned Dual-Gate Single-Electron Transistors (DG-SETs)," 2007 International Conference on Solid State Devices and Materials, pp.1136-1137, Tsukuba, Japan, September 19-21, 2007.[INTL]  [DOWNLOAD]
  79. Keum-Dong Jung, Byeong-Ju Kim, Yoo Chul Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "An Analytic Current-Voltage Equation for Top-contact OTFTs Including the Effects of Variable Series Resistance," 2007 International Conference on Solid State Devices and Materials, pp.1080-1081, Tsukuba, Japan, September 19-21, 2007.[INTL]  [DOWNLOAD]
  80. Jongwook Jeon, Yeonam Yun, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Spatial Distrubution of Channel Thermal Noise in Short-Channel MOSFETs," 2007 International Conference on Solid State Devices and Materials, pp.448-449, Tsukuba, Japan, September 19-21, 2007.[INTL]  [DOWNLOAD]
  81. Junsoo Kim, Jaehong Lee, Yeonam Yun, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Accurate Extraction of Mobility, Effective Channel Length, and Source/Drain Resistance in 60 nm MOSFETs," 2007 International Conference on Solid State Devices and Materials, pp.442-443, Tsukuba, Japan, September 19-21, 2007.[INTL]  [DOWNLOAD]
  82. Daewoong Kang, Sungnam Jang, Kyong joo Lee, Jinjoo Kim, Dongwon Chang, Hyukje Kwon, Wonseong Lee, Il Han Park, Jun Su Kim, Jae Hong Lee, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Improving the Cell Characteristics Using SiN Liner at Active Edge in 4G NAND Flash," 2007 International Conference on Solid State Devices and Materials, pp.238-239, Tsukuba, Japan, September 19-21, 2007.[INTL]  [DOWNLOAD]
  83. Keum-Dong Jung, Byeong-Ju Kim, Yoo Chul Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Concept of Effective Gate-Source Overlap Length in Inverted-staggered TFT Structures," 2007 International Meeting on Information Display, pp.1270-1272, Daegu, Korea, August 27-31, 2007.[INTL]  [DOWNLOAD]
  84. 조성재, 박일한, 이정훈, 윤장근, 김두현, 이길성, 김윤, 이동화, 신형철, 이종덕, 박병국, " 신뢰성 있는 동작을 위한 수직 구조 플래시 메모리의 공정 및 전압 조건의 최적화 연구," 2007년도 대한전자공학회 하계종합학술대회, 부산, pp. 743-744, 7월11일-13일, 2007. [DOWNLOAD]
  85. Yoo Chul Kim, Keum-Dong Jung, Byeong-Ju Kim, Jong Duk Lee, and Byung-Gook Park , "A New Threshold Voltage Extraction Method for Organic Thin-Film Transistors", The 22nd International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2007), Busan, Korea, vol. 3, pp. 1445-1446, July 8-11, 2007. [INTL]  [DOWNLOAD]
  86. Se Hwan Park, Il Han Park, Jung Hoon Lee, Jong-Duk Lee, and Byung-Gook Park, "2-bit/Cell Split Gate Flash Memory with Double Gate," The 22nd International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2007), Busan, Korea, vol. 2, pp. 437-438, July 8-11, 2007. [INTL]  [DOWNLOAD]
  87. Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Jong-Duk Lee, and Byung-Gook Park, "Characterization of 2-bit Recessed Channel Memory with Lifted Charge Trapping Node Scheme", The 22nd International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2007), Busan, Korea, vol. 2, pp. 437-438, July 8-11, 2007. [INTL]  [DOWNLOAD]
  88. B. Yeop Majlis, S. Afrang and Jong-Duk Lee, "Minimized Area Ka-Band DMTL Phase Shifter," MEMS Technology and Devices (ICMAT 2007 Conference Proceedings), Singapore, pp. 365-368, July 1-6, 2007.[INTL]  [DOWNLOAD]
  89. Seongjae Cho, Il Han Park, Jung Hoon Lee, Jang-Gn Yun, Doo-Hyun Kim, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Establishing Read Operation Bias Schemes for 3-D Pillar-Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI)", 2007 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Gyeongju, Korea, pp. 247-250, June 25-27, 2007. [INTL]  [DOWNLOAD]
  90. [Invited] Byung-Gook Park and Jong Duk Lee, "Silicon Nanoelectronic Devices and Their Fabrication", ISESCO International Workshop and Conference on Nanotechnology (IWCN2007), Malaysia, pp. 4, June 12-15, 2007. [INTL]  [DOWNLOAD]
  91. [Invited] Byung-Gook Park and Jong Duk Lee, "Nanoscale CMOS Devices and Their Fabrication", ISESCO International Workshop and Conference on Nanotechnology (IWCN2007), Malaysia, pp. 3, June 12-15, 2007. [INTL]  [DOWNLOAD]
  92. [Invited] Jong Duk Lee and Keum-Dong Jung, "Reliability Issues of Bottom-Contact Pentacene Thin-Film Transistors", ISESCO International Workshop and Conference on Nanotechnology (IWCN2007), Malaysia, pp. 11, June 12-15, 2007. [INTL]  [DOWNLOAD]
  93. Jong Pil Kim, Jae Young Song, Sang Wan Kim, Woo Young Choi, Jong Duk Lee, and Byung-Gook Park, "30-nm Asymmetric NMOSFET Using a Novel Fabrication Method", IEEE 2007 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 89-90, June 10-11, 2007. [INTL]  [DOWNLOAD]
  94. Hoon Jeong, Yeun Seung Lee, Hanki Chung, Sangwoo Kang, Il Han Park, Chang Woo Oh, Ki-Whan Song, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "A Capacitor-less 1T DRAM Cell with High Sensing Margin", IEEE 2007 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 181-182, June 10-11, 2007. [INTL]  [DOWNLOAD]
  95. Il Han Park, Se Hwan Park, Seongjae Cho, Jung Hun Lee, Gil Sung Lee, Doo Hyun Kim, Jang Geoun Yoon, Yoon Kim, Jong Duk Lee, and Byung-Gook Park, "Self-Aligned Vertical Channel Split-Gate (VCSG) SONOS Flash Memory with Stair-Channel Structure Fabricated by Two-Step Si Etching Process", IEEE 2007 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 109-110, June 10-11, 2007. [INTL]  [DOWNLOAD]
  96. Yeun Seung Lee, Hoon Jeong, Han Ki Chung, Byung Su Yoo, Seung Beom Kim, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "New Capacitor-less 1T DRAM Cell Based on a Double Gate MOSFET with Vertical Channel (DGVC Cell)", IEEE 2007 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 63-64, June 10-11, 2007. [INTL]  [DOWNLOAD]
  97. Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Gil Sung Lee, Doo-Hyun Kim, Yoon Kim, Jong-Duk Lee, and Byung-Gook Park, "2-bit Recessed Channel Nonvolatile Memory Device with Lifted Charge Trapping Node Scheme", IEEE 2007 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 99-100, June 10-11, 2007. [INTL]  [DOWNLOAD]
  98. [Invited] Jong-Duk Lee, "Semiconductor and Nanatechnology Development in Korea," Institute of Microengineering and Nanoelectronics (IMEN) Special Lecture , Kebangsaan, Malaysia, May 8, 2007.[DOWNLOAD]
  99. Jang-Gn Yun, Yoon Kim, Il Han Park, Seongjae Cho, Jung Hoon Lee, Gil Sung Lee, Doo-Hyun Kim, Dong Hua Lee, Se-Hwan Park, Jong-Duk Lee, and Byung-Gook Park, "Study of Programming Characteristics of 4-bit SONOS Flash Memory Using  3-Dimensional Transient Simulation", 2nd International Conference on Memory Technology and Design, Giens, France, pp. 81-84, May 7-10, 2007. [INTL]  [DOWNLOAD]
  100. In Man Kang, Jong Duk Lee, and Hyungcheol Shin, "Analysis for modeling error in a macro-model of RF MOSFETs up to 110 GHz", International Workshop on compact modeling, Yokohama, Japan, pp. 27-30, Jan. 23, 2007.  [INTL]  [DOWNLOAD]
  101. Yeonam Yun, In Man Kang, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin"Extraction of effective carrier velocity in RF MOSFETs", Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Long Beach, California, USA, pp. 72-75, Jan. 10-12, 2007.  [INTL]  [DOWNLOAD]
  102. Youngho Jung, In Man Kang, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin"Simple MIM capacitor modeling for mm-wave applicaitons", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 1021-1022, Feb. 8-9, 2007.  [DOWNLOAD]
  103. In Man Kang, Jong Duk Lee, and Hyungcheol Shin "Extraction of cgb through three-port measurement and small-signal modeling of RF MOSFETs", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 1011-1012, Feb. 8-9, 2007.  [DOWNLOAD]
  104. Youngchang Yoon, Hochul Lee, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Characterization of output noise voltage in CMOS inverter circuit", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 899-900, Feb. 8-9, 2007.  [DOWNLOAD]
  105. Junsoo Kim, Jaehong Lee, Seungbum Hong, Juhwan Jung, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Study on resolution of a new silicon resistive probe", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 683-684, Feb. 8-9, 2007.  [DOWNLOAD]
  106. Jaehong Lee, Junsoo Kim, Juhwan Jung, Seungbum Hong, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Slider Type Silicon Resistive Probe", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 681-682, Feb. 8-9, 2007.  [DOWNLOAD]
  107. Yeonam Yun, In Man Kang, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Extraction of Effective Velocity for Electrons and Holes in RF MOSFETs", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 621-622, Feb. 8-9, 2007.  [DOWNLOAD]
  108. Jongwook Jeon, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "A New Noise Parameter Model of RF MOSFETs", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 617-618, Feb. 8-9, 2007.  [DOWNLOAD]
  109. Tae Hyun Oh, Ick Hyun Song, Yujo Yun, Y. W. Kim, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "A 5.3GHz CMOS LC Tank Low Noise Amplifier", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 167-168, Feb. 8-9, 2007.  [DOWNLOAD]
  110. Daewoong Kang, Il Han Park, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Improving the endurance characteristics through boron implant at active edge in NAND flash using 90nm design rule", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 59-60, Feb. 8-9, 2007.  [DOWNLOAD]
  111. K. Y. Kim, K. S .Roh, G. C. Kang, S. H. Seo, S. W. Kim, C. H. Lee, J. U. Lee, S. Y. Lee, K. J. Song, C. M. Choi, S. R. Park, B. G. Park, H. Shin, J. D. Lee, K. S. Min, D. J. Kim, D. H. Kim, and D. M. Kim "Halo Doping-Dependence and Structural Optimization of Short Channel Effects in Partially Insulated MOSFETs(PiFETs)", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 1085-1086, Feb. 8-9, 2007. [DOWNLOAD]
  112. K. S .Roh, S. H. Seo, S. Y. Lee, J. U. Lee, S. W. Kim, G. C. Kang, K. Y. Kim, C. H. Lee, K. J. Song, C. M. Choi, S. R. Park, B. G. Park, H. Shin, J. D. Lee, K. S. Min, D. J. Kim, D. H. Kim, and D. M. Kim " Lateral Profiling of Interface States in SONOS Flash Memories Using the Optical Charge Pumping Method", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 1045-1046, Feb. 8-9, 2007. [DOWNLOAD]
  113. S. Y. Lee, S. H. Seo, K. S .Roh, J. U. Lee, S. W. Kim, G. C. Kang, K. Y. Kim, C. H. Lee, S. Y. Lee, K. J. Song, C. M. Choi, S. R. Park, B. G. Park, H. Shin, J. D. Lee, K. S. Min, D. J. Kim, D. H. Kim, and D. M. Kim " Extraction of the Interface Trap Density in SONOS Flash Memory Cell Transistors by Optical Subthreshold Current Method", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 1041-1042, Feb. 8-9, 2007. [DOWNLOAD]
  114. S. W. Kim, J. U. Lee, K. S .Roh, G. C. Kang, S. H. Seo, K. Y. Kim, C. H. Lee, S. Y. Lee, K. J. Song, C. M. Choi, S. R. Park, B. G. Park, H. Shin, J. D. Lee, K. S. Min, D. J. Kim, D. H. Kim, and D. M. Kim " Characterization of Tunnel Oxide Degradation under NAND-type Program/Erase Stresses of SONOS Flash Memory Cell Transistors with 30 nm×30 nm Channel", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 1023-1024, Feb. 8-9, 2007. [DOWNLOAD]
  115. S. H. Seo, S. W. Kim, J. U. Lee, C. H. Lee, G. C. Kang, K. S .Roh, K. Y. Kim, S. Y. Lee, K. J. Song, C. M. Choi, S. R. Park, B. G. Park, H. Shin, J. D. Lee, K. S. Min, D. J. Kim, D. H. Kim, and D. M. Kim " Narrow Width Effect of an NROM-type SONOS Flash Memory Device on Program/Erase Cycling Behavior", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 67-68, Feb. 8-9, 2007. [DOWNLOAD]
  116. J. U. Lee, S. W. Kim, K. S .Roh, G. C. Kang, S. H. Seo, K. Y. Kim, C. H. Lee, S. Y. Lee, K. J. Song, C. M. Choi, S. R. Park, B. G. Park, H. Shin, J. D. Lee, K. S. Min, D. J. Kim, D. H. Kim, and D. M. Kim " Extraction of Si3N4 Trap Density Distribution in SONOS Flash Memories based on Optical C-V Methodd", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 65-66, Feb. 8-9, 2007. [DOWNLOAD]
  117. 정 훈,이윤성, 박일한, 송재영, 김종필, 신형철, 이종덕, 박병국, "Capacitorless 1T DRAM Cell based on a Partially Depleted SOI MOSFET with Multi Body Doping Structure", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 99-100, Feb. 8-9, 2007.  [DOWNLOAD]
  118. Dong-Wook Park, Cheon An Lee, Keum-Dong Jung, Byeong-Ju Kim, Byung-Gook Park, and Jong Duk Lee, "Effect of Insulator Thickness in Double Layer Insulator OTFTs", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 123-124, Feb. 8-9, 2007.  [DOWNLOAD]
  119. Cheon An Lee, Dong-Wook Park, Keum-Dong Jung, Byung-ju Kim, Yoo Chul Kim, Jong Duk Lee, and Byung-Gook Park, "Organic Thin-film Transistors and Ring Oscillator Using Poly(4-Vinyl Phenol)/Oxide Double Layer Gate Insulator", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 127-128, Feb. 8-9, 2007.  [DOWNLOAD]
  120. Byeong-Ju Kim, Cheon An Lee, Dong-Wook Park, Jin-Sung Park, Pan-kwi Park, Keum-Dong Jung, Yoo Chul Kim, Byung- Gook Park, and Jong Duk Lee, "Low Voltage Organic Field Effect Transistors with Atomic Layer Deposition HfO2 and Al2O3 Gate Dielectric", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 237-238, Feb. 8-9, 2007.  [DOWNLOAD]
  121. Keum-Dong Jung, Yoo Chul Kim, Cheon An Lee, Dong-Wook Park, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Extraction of Bulk Resistance Using Admittance Modeling of Pentacene MIS Structure", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 259-260, Feb. 8-9, 2007.  [DOWNLOAD]
  122. Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Jong-Duk Lee, and Byung-Gook Park, "Formation of Si-rich Silicon Nitride with Low Deposition Rate for NanosCALe Nonvolatile Memory Application", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 585-586, Feb. 8-9, 2007.  
  123. Yoo Chul Kim, Cheon An Lee, Dong-Wook Park, Keum-Dong Jung, Byung-Ju Kim, Jong Duk Lee, and Byung-Gook Park, "Fabrication of D Flip-Flop Using P-type Organic Thin-Film Transistors", The 14th Korean Conference on Semiconductors, Seogwipo, Korea, pp. 687-688, Feb. 8-9, 2007.  [DOWNLOAD]
  124. Dae Woong Kang, Sungnam Jang, Kyongjoo Lee, Jinjoo Kim, Hyukje Kwon, Wonseong Lee, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Improving the cell characteristics using low-k gate spacer in 1Gb NAND flash memory", IEEE International Electron Devices Meeting, San Francisco, U.S.A., Dec. 11-13, 2006. [INTL]  [DOWNLOAD]
  125. Dong-Wook Park, Cheon An Lee, Keum-Dong Jung, Byeong-Ju Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Performance Improvement of OTFTs using Double Layer Insulator," IEEE International Conference on Semiconductor Electronics, Kuala Lumpur, Malaysia, pp. 48-51, Nov. 29-Dec. 1, 2006.[INTL]  [DOWNLOAD]
  126. Keum Dong Jung, Byung-ju Kim, Cheon An Lee, Dong-Wook Park, Byung-Gook Park, Hyungcheol Shin, Jong Duk Lee, "Considerations on the C-V Characteristics of Pentacene Metal-Insulator-Semiconductor Capacitors," IEEE International Conference on Semiconductor Electronics, Kuala Lumpur, Malaysia, pp. 572-575, Nov. 29-Dec. 1, 2006.[INTL]  [DOWNLOAD]
  127. Youngchang Yoon, Hochul Lee, Byung-Gook Park, Jong Duk Lee and Hyungcheol Shin, "Analysis of the Output Noise Voltage in CMOS Image Sensor Readout Circuit," IEEE International Conference on Semiconductor Electronics, Kuala Lumpur, Malaysia, pp. 944-946, Nov. 29-Dec. 1, 2006.[INTL]  [DOWNLOAD]
  128. Taehyun Oh, Yujo Yun, Y.W. Kim, Jong Duk Lee, Hyungcheol Shin, "Consideration of bondingwire inductance In the design of a 5.65 GHz CMOS LNA", International SoC Design Conference, Seoul, Korea, pp.403-404, Oct. 2006.[INTL]  [DOWNLOAD]
  129. Jaehong Lee, Junsoo Kim, Juhwan Jung, Seungbum Hong, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "A New Resistive Probe With Higher Resolution", IEEE Nanotechnology Materials and Devices Conference 2006, Gyeongju, Korea, pp. 114-115, October 22-25, 2006.[INTL]  [DOWNLOAD]
  130. Jung-Hoon Lee, Hyun-Woo Kim, Il Han Park, Seongjae Cho, Gil Seong Lee, Doo Hyun Kim, Jang Gn Yun, Yoon Kim, Jong Duk Lee, Byung-Gook Park, and Euijoon Yoon, "Low-pressure, low-temperature hydrogen annealing for nanoscale silicon fin rounding", IEEE Nanotechnology Materials and Devices Conference 2006, Gyeongju, Korea, pp. 638-639, October 22-25, 2006.[INTL]  [DOWNLOAD]
  131. Sang Wan Kim, Woo Young Choi, Jae Young Song, Jong Pil Kim, Junsoo Kim, Hyoungsoo Ko, Hongsik Park, Chulmin Park, Seungbum Hong, Sung-Hoon Choa, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Analysis and Modeling of Resistive Probes", IEEE Nanotechnology Materials and Devices Conference 2006, Gyeongju, Korea, pp. 318-319, October 22-25, 2006.[INTL]  [DOWNLOAD]
  132. Woo Young Choi, Jae Young Song, Jong Pil Kim, Sang Wan Kim, Jong Duk Lee, and Byung-Gook Park, "Breakdown Voltage Reduction in I-MOS Devices", IEEE Nanotechnology Materials and Devices Conference 2006, Gyeongju, Korea, pp. 380-381, October 22-25, 2006.[INTL]  [DOWNLOAD]
  133. J. G. Yun, Y. Kim, I. H. Park, S. J. Cho, J. H. Lee, D. H. Kim, G. S. Lee, J. Y. Song, J. D. Lee, and B. G. Park, "Investigation of 4-bit SONOS Nonvolatile Memory Using 3-Dimensional Numerical Siumulation," IEEE Nanotechnology Materials and Devices Conference 2006, pp. 214-215, Gyeongju, Korea, October 22-25, 2006.[INTL]  [DOWNLOAD]
  134. 강인만, 이종덕, 신형철, "Temperature dependency of device parameter for RF MOSFETs and model verification Up to 110 GHz," 실리콘 RF집적회로 기술 워크샾, Jeju, Korea, Nov. 2006.[INTL]  [DOWNLOAD]
  135. Hoon Jeong, Yeun Seung Lee, Sangwoo Kang, Il Han Park, Woo Young Choi, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "Capacitorless DRAM Cell with Highly Scalable Surrounding Gate Structure," 2006 International Conference on Solid State Devices and Materials, pp.574-575, Yokohama, Japan, September 13-15, 2006.[INTL]  [DOWNLOAD]
  136. Cheon An Lee, Dong-Wook Park, Keum-Dong Jung, Jong Duk Lee, and Byung-Gook Park, "Full-swing pentacene organic inverter with long-channel driver and short-channel load," 2006 International Conference on Solid State Devices and Materials, pp.774-775, Yokohama, Japan, September 13-15, 2006.[INTL]  [DOWNLOAD]
  137. Woo Young Choi, Jae Young Song, Jong Pil Kim, Jong Duk Lee, and Byung-Gook Park, "Multi-Functionality of Novel Structured Tunneling Devices," 2006 International Conference on Solid State Devices and Materials, pp.824-825, Yokohama, Japan, September 13-15, 2006.[INTL]  [DOWNLOAD]
  138. Jae Young Song, Woo Young Choi, Jong Pil Kim, Jong Duk Lee, and Byung-Gook Park, "Novel Gate-All-Around MOSFETs with Self-Aligned Structure," 2006 International Conference on Solid State Devices and Materials, pp.1072-1073, Yokohama, Japan, September 13-15, 2006.[INTL]  [DOWNLOAD]
  139. Dong-Wook Park, Cheon An Lee, Keum-Dong Jung, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Low Hysteresis Organic Thin -Film Transistors and Inverters with Hybrid Gate Dielectric," 2006 International Conference on Solid State Devices and Materials, pp.928-929, Yokohama, Japan, September 13-15, 2006.[INTL]  [DOWNLOAD]
  140. Ki Hyun Lyoo, Byeong-Ju Kim, Cheon An Lee, Keum-Dong Jung, Dong-Wook Park, Byung-Gook Park, and Jong Duk Lee, "Performance improvement in bottom-contact pentacene organic thin-film transistors by the PMMA layer insertion," 2006 International Meeting on Information Display, pp.1139-1141, Daegu, Korea, August 22-25, 2006.[INTL]  [DOWNLOAD]
  141. Dong-Wook Park, Cheon An Lee, Keum-Dong Jung, Byung-Gook Park, and Jong Duk Lee, "Bias stress effect in organic thin-film transistors with cross-linked PVA gate dielectric and its reduction method using SiO2 blocking layer," 2006 International Meeting on Information Display, pp.445-448, Daegu, Korea, August 22-25, 2006.[INTL]  [DOWNLOAD]
  142. Keum-Dong Jung, Cheon An Lee, Dong-Wook Park, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Modeling of pentacene MIS capacitors with admittance measurements and the effects of dispersive charge transport," 2006 International Meeting on Information Display, pp.67-69, Daegu, Korea, August 22-25, 2006.[INTL]  [DOWNLOAD]
  143. [Invited] Byung-Gook Park, Woo Young Choi and Jong Duk Lee,"Characterization and Design Consideration of I-MOS Devices," International Technical Conference on Circuits/Systems, Computers and Communications 2006,Thailand, pp. III_693-III_696, July 10-13, 2006. [INTL]  [DOWNLOAD]
  144. Kwon-chil Kang, Sangwoo Kang, Jin Ho Kim, Hong Sun Yang, Woo Young Choi, Gil Seong Lee, Jong Duk Lee, and Byung-Gook Park, "An Approach to a Small Dot Fabricated with an Etch-back Process," International Technical Conference on Circuits/Systems, Computers and Communications 2006,Thailand, pp. I_37-I_40, July 10-13, 2006. [INTL]  [DOWNLOAD]
  145. Jong Pil Kim, Woo Young Choi, Jae Young Song, Seongjae Cho, Sangwoo Kang, Sang Wan Kim, Jong Duk Lee, and Byung-Gook Park, "Design and Simulation of Asymmetric MOSFETs," 2006 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sendai, Japan, pp. 175-178, July 3-5, 2006. [INTL]  [DOWNLOAD]
  146. Seongjae Cho, Jang-Gn Yun, Il Han Park, Jung Hoon Lee, Jong Pil Kim, Sangwoo Kang, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Analyses on Current Characteristics of 3-D MOSFET Nonvolatile Memory Devices Determined by Junction Doping Profiles," 2006 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sendai, Japan, pp. 171-174, July 3-5, 2006. [INTL]  [DOWNLOAD]
  147. Keum-Dong Jung, Cheon An Lee, Dong-Wook Park, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Extraction of Accumulation Mobility from C-V Characteristics of Pentacene MIS Structures", Device Research Conference, Penn State Univ., U. S. A., pp.139-140, June. 2006. [INTL]  [DOWNLOAD]
  148. Youngchang Yoon, Hochul Lee, In Man Kang, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Random telegraph noise in 130 nm n-MOS and p-MOS transistors", Device Research Conference, Penn State Univ., U. S. A., pp.283-284, June. 2006. [INTL]  [DOWNLOAD]
  149. Doo-Hyun Kim, Jung Hoon Lee, Il Han Park, Sung Jae Cho, Gil SUNG Lee, Yoon Kim, Jae Young Song, Jin Ho Kim, Dong-Wook Park, Jong Pil Kim, Jong Duk Lee, and Byung-Gook Park, "Silicon Corner Rounding for Nano-Scale Non-volatile Memory (NVM) Using Conventional Thermal Oxidation," International Conference on Electronics, Information, and Communication 2006, Ulaanbaatar, Mongolia, pp. 137-140, June 27-28, 2006. [INTL]  [DOWNLOAD]
  150. Jae Young Song, Woo Young Choi, Jong Pil Kim, Sang Wan Kim, Doo-Hyun Kim, Jin Ho Kim, Dong-Wook Park, Jong Duk Lee, and Byung-Gook Park, "Effects on Multi-Fin on Self-Aligned Gate-All-Around MOSFETs," 2006, Ulaanbaatar, Mongolia, pp. 21-24, June 27-28, 2006. [INTL]  [DOWNLOAD]
  151. 최우영, 송재영, 김종필, 김상완, 이종덕, 박병국, "Reduction of Breakdown Voltage in I-MOS Devices," 2006년도 대한전자공학회 하계종합학술대회, 제주, pp. 593-594, 06월 21일-23일, 2006. [DOWNLOAD]
  152. 김종필, 최우영, 송재영, 김상완, 이종덕, 박병국, "Design and Simulation of Asymmetric MOSFETs," 2006년도 대한전자공학회 하계종합학술대회, 제주, pp. 577-578, 06월 21일-23일, 2006. [DOWNLOAD]
  153. 윤영창, 정영호, 박병국, 이종덕, 신형철, "A New Substrate Resistance Model of RF MOSFETs," 2006년도 대한전자공학회 하계종합학술대회, 제주, pp. 493-494, 06월 21일-23일, 2006. [DOWNLOAD]
  154. 이윤성, 정훈, 송재영, 김종필, 이종덕, 신형철, 박병국, "New Capacitorless 1T DRAM Cells : Surrounding Gate and Double Gate MOSFET With Vertical Channel (SGVC and DGVC Cell)," 2006년도 대한전자공학회 하계종합학술대회, 제주, pp. 479-480, 06월 21일-23일, 2006. [DOWNLOAD]
  155. 조성재, 윤장근, 박일한, 이정훈, 김두현, 이길성, 이종덕, 박병국, "3차원 구조 소자에서의 doping profile에 따른 전류 특성 분석," 2006년도 대한전자공학회 하계종합학술대회, 제주, pp. 475-476, 06월 21일-23일, 2006. [DOWNLOAD]
  156. Ju Hee Park, Woo Young Choi, Jae Young Song, Jong Pil Kim, Jong Duk Lee, and Byung-Gook Park, "Double-Gate SOI FinFETs Using Sidewall Multi-Line Patterning Technique,” IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 145-146, June 11-12, 2006.[INTL]  [DOWNLOAD]
  157. Jong Pil Kim, Woo Young Choi, Jae Young Song, Ju Hee Park, Jong Duk Lee, and Byung-Gook Park, "Design and Fabrication of Asymmetric MOSFETs Using a Sidewall Spacer,” IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 139-140, June 11-12, 2006.[INTL]  [DOWNLOAD]
  158. Junsoo Kim, Youngho Jung, Seungbum Hong, Juhwan Jung, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Nano-scale Resistive Probe for Recording Applications,” IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 79-80, June 11-12, 2006.[INTL]  [DOWNLOAD]
  159. Seung-hwan Song, Kyung Rok Kim, Jin Ho Kim, Sangwoo Kang, Kwon Chil Kang, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Fabrication and Characterization of Tri-Gate Field-induced Inter-band Tunneling Effect Transistors (TG-FITETs),” IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 53-54, June 11-12, 2006.[INTL]  [DOWNLOAD]
  160. Jae Young Song, Woo Young Choi, Ju Hee Park, Jong Pil Kim, Jong Duk Lee, and Byung-Gook Park, "Effects of Oversized Bottom Gate in Self-Aligned Gate-All-Around MOSFET ,” IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 47-48, June 11-12, 2006.[INTL]  [DOWNLOAD]
  161. Hoon Jeong, Ki-Whan Song, Il Han Park, Tae Hun Kim, Yeun Seung Lee, Seong-Goo Kim, Jun Seo, Kyoungyong Cho, Kangyoon Lee, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, " New Capacitor-less 1T DRAM Cell : Surrounding Gate MOSFET with a Vertical Channel (SGVC Cell),” IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 103-104, June 11-12, 2006.[INTL]  [DOWNLOAD]
  162. Byung Yong Choi, Choong-Ho Lee, Yong Kyu Lee, Hyungcheol Shin, Jong Duk Lee, Byung-Gook Park, Dong-Won Kim, Suk-Kang Sung, Se Hoon Lee, Byung-Kyu Cho, Tae-Yong Kim, Eun Suk Cho, Jong Jin Lee, and Donggun Park, "Investigation of Lateral Charge Distribution of 2-bit SONOS Memory Devices Using Physically Separated Twin SONOS Structure," ICMTS2006, Texas, U.S.A., pp. 47-50, March 6-9, 2006. [INTL]  [DOWNLOAD]
  163. Woo Young Choi, Jae Young Song, Jong Pil Kim, Jong Duk Lee, and Byung-Gook Park, "I-MOS Devices with High ON/OFF Current Ratio and Its integration with TFETs," The 13th Korean Conference on Semiconductors, Jaeju, Korea, pp. 101-102, Feb. 23-24, 2006.   [DOWNLOAD]
  164. Cheon An Lee, Dong Wook Park, Chang Bum Park, Sung Hun Jin, Jong Duk Lee, and Byung-Gook Park, "Process Optimization of Bottom-contact Pentacene OTFTs with a Cross-linked Poly-(vinylalcohol) Gate Insulator," The 13th Korean Conference on Semiconductors, Jaeju, Korea, pp. 283-284, Feb. 23-24, 2006.   [DOWNLOAD]
  165. Keum-Dong Jung, Cheon An Lee, Dong Wook Park, Byung-Gook Park, Hyung Chel Shin, and Jong Duk Lee, "Hysteresis Characteristics of Pentacene OFETs from C-V and I-V Measurements," The 13th Korean Conference on Semiconductors, Jaeju, Korea, pp. 293-294, Feb. 23-24, 2006.   [DOWNLOAD]
  166. Dong Wook Park, Cheon An Lee, Sung Hun Jin, Keum-Dong Jung, Byung-Gook Park, and Jong Duk Lee, "Pentacene OTFTs using Cross-linked PVA Gate Dielectrics and Its Reliability Characteristics," The 13th Korean Conference on Semiconductors, Jaeju, Korea, pp. 249-250, Feb. 23-24, 2006.   [DOWNLOAD]
  167. Il Hwan Cho, Junsoo Kim, Il Han Park, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, and Jong-Ho Lee, "Isolation Method for Bulk FinFET without Using CMP Process," The 13th Korean Conference on Semiconductors, Jaeju, Korea, pp. 1281-1282, Feb. 23-24, 2006.   [DOWNLOAD]
  168. Seung-hwan Song, Kyung Rok Kim, Sangwoo Kang, Jin Ho Kim, Kwon Chil Kang, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "Room Temperature Negative-Differential Trans-conductance Characteristics of Tri-Gate FITET," The 13th Korean Conference on Semiconductors, Jaeju, Korea, pp. 165-166, Feb. 23-24, 2006.   [DOWNLOAD]
  169. Junsoo Kim, Seungbum Hong, Hyungsoo Ko, Dong-Ki Min, Hongsik Park, Juhwan Jung, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Nano-scale Resistive Probe Tip with High Resolution," The 13th Korean Conference on Semiconductors, Jaeju, Korea, pp. 761-762, Feb. 23-24, 2006.   [DOWNLOAD]
  170. Byung Yong Choi, Byung-Gook Park, Jong Duk Lee, Hyungchel Shin, Yong Kyu Lee, Suk-Kang Sung, Se-Hoon Lee, Heesoon Chae, Jong Jin Lee, Keun Hee Bai, Dong-Dae Kim, Dong-Won Kim, Choong-Ho Lee, and Donggun Park, "TWIn SONOS TransistOR (TWISTOR) for 2-bit/cell SONOS Memory Technology," IEEE Non-Volatile Semiconductor Memory Workshop, California, U.S.A., pp. 72-73, Feb. 12-16, 2006. [INTL]  [DOWNLOAD]
  171. Woo Young Choi, Byung Yong Choi, Ju Hee Park, Dong-Won Kim, Choong-Ho Lee, Donggun Park, Jong Duk Lee, Young June Park, and Byung-Gook Park, "25nm Programmable Virtual Source/Drain MOSFETs Using a Twin SONOS Memory Structure," 2005 International Semiconductor Device Research Symposium, Bethesda, U.S.A., December 7-9, 2005. [INTL]  [DOWNLOAD]
  172. Il Hwan Cho, Junsoo Kim, Il Han Park, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, and Jong-Ho Lee, "Isolation Method for Bulk FinFET without Using CMP Process," 2005 International Semiconductor Device Research Symposium, Maryland, U.S.A., December 7-9, 2005. [INTL]  [DOWNLOAD]
  173. Woo Young Choi, Jae Young Song, Jong Duk Lee, Young June Park, and Byung-Gook Park, "70-nm Impact-Ionization Metal-Oxide-Semiconductor (I-MOS) Devices Integrated with Tunneling Field-Effect Transistors (TFETs)," International Electron Devices Meeting, Washington, D.C., U.S.A., pp. 975-978, Dec. 5-7, 2005.[INTL]  [DOWNLOAD]
  174. K. D. Jung, S. H. Jin, C. A. Lee, C. B. Park, B. G. Park, H. C. Shin, and J. D. Lee, "Effects of Peripheral Region on C-V Characteristics of Organic MIS Capacitors," The 12th International Display Workshops in conjunction with Asia Display 2005, Takamatsu, Japan, pp. 1053-1056, December 6-9, 2005. [INTL]  [DOWNLOAD]
  175. Jong Duk Lee, Woo Young Choi, Byung-Gook Park, "Challenges in Nanoscale Devices and Breakthrough," 2005 IEEE National Symposium on Microelectronics, Kuching, Malaysia, pp. A1-A5, November 21-24, 2005. [INTL]  [DOWNLOAD]
  176. Seongjae Cho, Tae Hun Kim, Il Han Park, Yongsang Jeong, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "The Effects of Corner Transistors in STI-isolated SOI MOSFETs," IEEK Fall Conference 2005, Seoul, Korea, pp. 615-618, November 26, 2005.   [DOWNLOAD]
  177. Seung-hwan Song, Kyung Rok Kim, Sangwoo Kang, Jin Ho Kim, Kwon Chil Kang, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "Simulation Study on a Quasi Fermi Energy Movement in the Floating Body Region of FITET (Field-induced Inter-band Tunneling Effect Transistor)," IEEK Fall Conference 2005, Seoul, Korea, pp. 679-682, November 26, 2005.   [DOWNLOAD]
  178. Hyuck In Kwon, Jong Duk Lee, and Umberto Ravaioli, "Simulation of Electronic/Ionic Mixed Conduction in Solid Ionic Memory Devices," 14th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors (HCIS 14), p.45, Chicago, U.S.A., July 24-29, 2005.[INTL]  [DOWNLOAD]
  179. Keum Dong Jung, Sung Hun Jin, Chang Bum Park, Hyungcheol Shin, Byung Gook Park, and Jong Duk Lee, "Effects of Peripheral Pentacene Region on C-V Characteristics of Metal-Oxide-Pentacene Capacitor Structure," 2005 International Meeting on Information Display, pp.1284-1287, Seoul, Korea, July 19-23, 2005.[INTL]  [DOWNLOAD]
  180. Chang Bum Park, Sung Hun Jin, Byung-Gook Park, and Jong Duk Lee, "Hybrid Insulator Organic Thin Film Transistors With Improved Mobility Characteristics," 2005 International Meeting on Information Display, pp.1291-1293, Seoul, Korea, July 19-23, 2005.[INTL]  [DOWNLOAD]
  181. Ki Hyun Ryoo, Cheon An Lee, Sung Hun Jin, Keum Dong Jung, Chang Bum Park, Jong Duk Lee, Hyungcheol Shin, and Byung Gook Park, "Triple Layer Passivation for Organic Thin-Film Transistors," 2005 International Meeting on Information Display, pp.1310-1312, Seoul, Korea, July 19-23, 2005.[INTL]  [DOWNLOAD]
  182. Cheon An Lee, Kyoung Chul Jang, Sung Won Kim, Ki Hyun Ryoo, Sung Hun Jin, Jong Duk Lee, HyungCheol Shin, and Byung Gook Park, "Electrical performance and contact resistance with the substrate temperature in the pentacene organic thin-film transistors," 2005 International Meeting on Information Display, pp.1317-1319, Seoul, Korea, July 19-23, 2005.[INTL]  [DOWNLOAD]
  183. Hyung Wook Noh, Pil Goo Jun, Sung Woo Ko, Byung Hwak Kwak, Sang Sik Park, Jong Duk Lee, Hyung Soo Uh, "Fabrication and Characteristics of CNT-FEAs with Under-gate Structure," 2005 International Meeting on Information Display, pp.1470-1473, Seoul, Korea, July 19-23, 2005.[INTL]  [DOWNLOAD]
  184. Seongjae Cho, Il Han Pak, Tae Hun Kim, Jung Hoon Lee, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Quantitative Analyses on Voltage Schemes for Reliable Operations of a Floating Gate Type Double Gate Nonvolatile Memory Cell," The 20th Commemorative International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2005), Jeju, Korea, pp. 147-148, July 4-7, 2005. [INTL]  [DOWNLOAD]
  185. Jae Sung Sim, Il Han Park, Seongjae Cho, Tae Hun Kim, Ki Whan Song, Jihye Kong, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "BAVI-Cell: A Novel High-Speed 50 nm SONOS Memory with Band-to-Band Tunneling Initiated Avalanche Injection Mechanism," 2005 Symposium on VLSI Technology, Kyoto, Japan, pp. 122-123, June 14-16, 2005.[INTL]  [DOWNLOAD]
  186. K.-W. Song, J.S. Sim, S.H. Song, J.D. Lee, B.-G. Park, H.H. Ko, H.S. Park, S.W. Lee, D.H. Lee, and Y.-W. Kim, "Multiple-valued logics based on SET/CMOS hybrid technology," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 26-27, June 12-13, 2005.[INTL]  [DOWNLOAD]
  187. Seongjae Cho, Il Han Park, Tae Hun Kim, Jae Sung Sim, Ki-whan Song, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Design and Optimization of Two-bit Double Gate Nonvolatile Memory Cell for Highly Reliable Operations," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 36-37, June 12-13, 2005.[INTL]  [DOWNLOAD]
  188. Il Han Park, Tae Hun Kim, Jae Sung Sim, Jong Duk Lee, and Byung-Gook Park, "Design of Depletion Induced Body Screening (DIBS) Structure on SOI for Reliable Nanoscale NAND Flash Array," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 38-39, June 12-13, 2005.[INTL]  [DOWNLOAD]
  189. Il Hwan Cho, Tai-su Park, Dong Gun Park, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, and Jong-Ho Lee, "Erase Characteristics of p-Channel Bulk FinFET SONOS Flash Memory," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 40-41, June 12-13, 2005.[INTL]  [DOWNLOAD]
  190. Woo Young Choi, Jae Young Song, Ju Hee Park, Jong Duk Lee, Young June Park, and Byung-Gook Park, "Effect of Substrate Doping Concentration on I-MOS Characteristics," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 46-47, June 12-13, 2005.[INTL]  [DOWNLOAD]
  191. In Man Kang and Hyungcheol Shin, "Non-Quasi-Static Small-Signal Modeling of SOI FinFETs," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 52-53, June 12-13, 2005.[INTL]  [DOWNLOAD]
  192. Jae Young Song, Woo Young Choi, JuHee Park, Jong Duk Lee, Young June Park, and Byung-Gook Park, "Optimization of GAA MOSFET Structure and Comparison with DG MOSFETs," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 70-71, June 12-13, 2005.[INTL]  [DOWNLOAD]
  193. Hoon Jeong, Ki-Whan Song, Soo-Ho Shin, Sang Ho Song, Jong Duk Lee, and Byung-Gook Park, "A Capacitor-less 1T DRAM Cell Based on a Surrounding Gate MOSFET with a Vertical Channel," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 92-93, June 12-13, 2005.[INTL]  [DOWNLOAD]
  194. Seung-hwan Song, Kyung Rok Kim, Ki-Whan Song, Jung Im Huh, Jong Duk Lee, and Byung-Gook Park, "Analytical Modeling of Field-induced Inter-band Tunneling Effect Transistors (FITETs) and Its Application," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 104-105, June 12-13, 2005.[INTL]  [DOWNLOAD]
  195. Sung Hun Jin, Keum Dong Jung, Hyungcheol Shin, Byung-Gook Park, and Jong Duk Lee, "Performance Improvement of Scaled-down Top-contact OTFTs by Two-Step-Deposition of Pentacene," 2005 SID International Symposium, pp. 292-295, Boston, U.S.A., May 24-27, 2005. [INTL]  [DOWNLOAD]
  196. Junsoo Kim, Seungbum Hong, Hyoungsoo Ko, Dong-Ki Min, Hongsik Park, Chulmin Park, Juhwan Jung, Jong Duk Lee, Byung-Gook Park, and Hyungcheol Shin, "Study on Sensitivity and Resolution of Resistive Probe by 3-D Device Simulation," IEEE Nanoscale Devices and System Integration, Houston, Texas, U.S.A., pp. 90, April 6, 2005. [INTL] [DOWNLOAD]
  197. Il Hwan Cho, Tai-su Park, Dong Gun Park, Kinam Kim, Hyungcheol Shin, Byung-Gook Park, Jong Duk lee, and Jong-Ho Lee, "Erase Characteristics of p-Channel Bulk FinFET SONOS Flash Memory with Fin Width," The 12th Korean Conference on Semiconductors, Seoul, Korea, pp. 357-358, Feb. 24-25, 2005.   [DOWNLOAD]
  198. Teresa Oh, Kyung-Sik Kim, Chi Kyu Choi, Jong Duk Lee, Kwang-Man Lee, "Pentacene Growth by Nucleophilic and Diels-Alder Reaction on SiOC Film," The 12th Korean Conference on Semiconductors, Seoul, Korea, pp. 197-198, Feb. 24-25, 2005.   [DOWNLOAD]
  199. Hyung Soo Uh, Pil Goo Jeon, Byung Hwak Kwak, Sang Sik Park, Sang Jik Kwon, Sung Woo Ko, Euo Sik Cho, Jong Duk Lee, and Chun Gyoo Lee, "Fabrication and Characterization of CNT-FEAs with Embedded Electron Beam Focusing Structure," The 12th Korean Conference on Semiconductors, Seoul, Korea, pp. 121-122, Feb. 24-25, 2005.   [DOWNLOAD]
  200. Sung Woo Ko, Pil Goo Jun, Byung Hwak Kwak, Hyung Wook Noh, Hyung Soo Uh, Jong Duk Lee, and Chun Gyoo Lee, "Enhanced Electron Field Emission from Carbon Nanotubes Growing on Rapid Thermal Annealed Ni Catalyst layer," The 12th Korean Conference on Semiconductors, Seoul, Korea, pp. 119-120, Feb. 24-25, 2005.   [DOWNLOAD]
  201. Woo Young Choi, Jae Young Song, Ju Hee Park, Hoon Jung, Byung Yong Choi, Jong Duk Lee, Young Jun Park, and Byung-Gook Park, "Fabrication of a 100nm n-Channel I-MOS and Its Electrical Characteristics," The 12th Korean Conference on Semiconductors, Seoul, Korea, pp. 101-102, Feb. 24-25, 2005.   [DOWNLOAD]
  202. Woo Young Choi, Jae Young Song, Byung Yong Choi, Jong Duk Lee, Young June Park, and Byung-Gook Park, "80nm Self-Aligned Complementary I-MOS Using Double Sidewall Spacer and Elevated Drain Structure and Its Applicability to Amplifiers with High Linearity," International Electron Devices Meeting, San Francisco, U.S.A., pp. 203-206, Dec. 13~15, 2004.[INTL]  [DOWNLOAD]
  203. Jong Duk Lee, Sung Hun Jin, Keum Dong Jung, and Byung-Gook Park, "Scaling-down Effects on the Electrical Performance of Top-contact Pentacene TFTs," 2004 IEEE International Conference on Semiconductor Electronics (ICSE2004), pp. 668-672, Kuala Lumpur, Malaysia, Dec. 7-9, 2004.[INTL]  [DOWNLOAD]
  204. Byung Yong Choi, Yong Kyu Lee, Woo Young Choi, Il Han Park, Hyungcheol Shin, Jong Duk Lee, Byung-Gook Park, Sung Taek Kang, Chilhee Chung, and Donggun Park,  "Programmable Virtual Source/Drain MOSFETs," 34th European Soild-State Device Research Conference, Leuven, Belgium, pp. 229-232, Sept. 21-23, 2004. [INTL]  [DOWNLOAD]
  205. [Invited]Byung-Gook Park, Kyung Rok Kim, Ki-Whan Song, Hyun Ho Kim, Jung Im Huh, and Jong Duk Lee, "Silicon Quantum Tunneling Devices - FIBTET and MOSET," Int'l Conf. on Solid State Devices and Materials 2004, Tokyo, Japan, pp. 120-121, September 15-17 2004. [INTL]  [DOWNLOAD]
  206. K.-W. Song, Y.K. Lee, K.R. Kim, J.I. Huh, J.D. Lee, B.-G. Park, J. Han, and Y.-W. Kim, "SET/CMOS Hybrid Integration Process for Multiple-Valued Logics," Int'l Conf. on Solid State Devices and Materials 2004, Tokyo, Japan, pp. 122-123, September 15-17 2004. [INTL]  [DOWNLOAD]
  207. Yong Kyu Lee, Byung Yong Choi, Jae Sung Sim, Ki Whan Song, Jong Duk Lee and Byung-Gook Park, Donggun Park, Chilhee Chung, "A Highly Scalable Split-Gate SONOS Flash Memory with Programmable-Pass and Pure-Select Transistors for Sub-90-nm Technology," Int'l Conf. on Solid State Devices and Materials 2004, Tokyo, Japan, pp. 252-253, September 15-17 2004. [INTL]  [DOWNLOAD]
  208. Sung Hun Jin, Sang Min Yi, Keum Dong Jung, Chang Bum Park, Chong Nam Chu, Hyung Chul Shin, Byung-Gook Park, and Jong Duk Lee, "Pentacene TFTs Fabricated by High-aspect Ratio Metal Shadow Mask," Int'l Conf. on Solid State Devices and Materials 2004, Tokyo, Japan, pp. 864-865, September 15-17 2004. [INTL]  [DOWNLOAD]
  209. Sung Woo Ko, Hyung Cheol Shin, Byung Gook Park, Jong Duk Lee, Pil Goo Jun, Byung Hwak Kwak, Hyung Wook Noh, Hyung Soo Uh, "Effect of Rapid Thermal Annealing on Growth and Field Emission Characteristics of Carbon Nanotubes," The 24th International Display Research Conference (Asia Display) in conjunction with The 4rd International Meeting on Information Display, pp.453-455, Taegu, Korea, August 23-27, 2004.[INTL]  [DOWNLOAD]
  210. Pil Goo Jun, Byung Hwak Kwak, Hyung Wook Noh, Soo Myun Lee, Hyung Soo Uh, Sang Sik Park, Sung Woo Ko, Euo Sik Cho, Jong Duk Lee, "A New Structure of Triode-type CNT-FEAs for Enhanced Electron Emission and Beam Focusing," The 24th International Display Research Conference (Asia Display) in conjunction with The 4rd International Meeting on Information Display, pp.456-458, Taegu, Korea, August 23-27, 2004.[INTL]  [DOWNLOAD]
  211. Cheon An Lee, Sung Hun Jin, Keum Dong Jung, Jong Duk Lee, and Byung-Gook Park, "Thin-film passivation of the polymer EL device using parylene and its application to the passive matrix PELD system," The 24th International Display Research Conference (Asia Display) in conjunction with The 4rd International Meeting on Information Display, pp.669-672, Taegu, Korea, August 23-27, 2004.[INTL]  [DOWNLOAD]
  212. Sang Jik Kwon, Byeong Kyoo Shon, Hak June Chung, Sang Heon Lee, Hyung Wook Choi, Jong Duk Lee, Chun Gyoo Lee, "Fabrication of Triode-Type CNT-FED by A Screen-printing of CNT Paste," The 24th International Display Research Conference (Asia Display) in conjunction with The 4rd International Meeting on Information Display, pp.866-869, Taegu, Korea, August 23-27, 2004.[INTL]  [DOWNLOAD]
  213. Sung Hun Jin, Keum Dong Jung, Hyung Chul Shin, Byung-Gook Park, and Jong Duk Lee, Sang Min Yi and Chong Nam Chu, "Pentacene Thin Film Transistors Fabricated by High-aspect Ratio Metal Shadow Mask," The 24th International Display Research Conference (Asia Display) in conjunction with The 4rd International Meeting on Information Display, pp.881-884, Taegu, Korea, August 23-27, 2004.[INTL]  [DOWNLOAD]
  214. Il Han Park, Yong Kyu Lee, Chang Ju Lee, Suk Kang Sung, Tae Hun Kim, Jae Sung Sim, Ji Hye Kong, Jong Duk Lee and Byung Gook Park, Soo Doo Chae, and Chung Woo Kim, "Fabrication of 30 nm Square-Channel SONOS Flash Memory on SOI and Characterization of Program/Erase Operation in Nanoscale Regime," IEEE Non-Volatile Semiconductor Memory Workshop(20th NVSM Workshop), pp.94-95, Monterey, California, U.S.A., August 22-26, 2004.[INTL]  [DOWNLOAD]
  215. Y. K. Lee, I. H. Park, J. S. Sim, J. D. Lee, B.-G. Park, S. T. Kang, C. Chung, D. Park, and K Kim, "Highly Scalable 2-bit SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) with 18 nm Storage Nodes under a Single Gate for Sub-90 nm Flash Technology," IEEE Non-Volatile Semiconductor Memory Workshop(20th NVSM Workshop), pp.96-97, Monterey, California, U.S.A., August 22-26, 2004.[INTL]  [DOWNLOAD]
  216. Kyung Rok Kim, Hyun Ho Kim, Ki-Whan Song, Jung Im Huh, Jong Duk Lee, and Byung-Gook Park, "SOI MOSFET-Based Quantum Tunneling Device - FIBTET,” 62nd Annual Device Research Conference, pp. 217-218, Indiana, USA, June. 21-23, 2004.[INTL]  [DOWNLOAD]
  217. Byung Yong Choi, Yong-Kyu Lee, Woo Young Choi, Il Han Park, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Nano-scale MOSFETs with Programmable Virtual Source/Drain,” 62nd Annual Device Research Conference, pp. 213-214, Indiana, USA, June. 21-23, 2004.[INTL]  [DOWNLOAD]
  218. Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "A New Fabrication Method for Self-aligned Nanoscale I-MOS (Impact-ionization MOS),” 62nd Annual Device Research Conference, pp. 211-212, Indiana, USA, June. 21-23, 2004.[INTL]  [DOWNLOAD]
  219. Cheon An Lee, Sung Hun Jin, Keum Dong Jung, Jong Duk Lee, and Byung-Gook Park, "Full-Swing Pentacene Organic Thin-Film Transistor Inverter with Enhancement-Mode Driver and Depletion-Mode Load,” 62nd Annual Device Research Conference, pp. 181-182, Indiana, USA, June. 21-23, 2004.[INTL]  [DOWNLOAD]
  220. Il Hwan Cho, Tai-su Park, Jeong Dong Choe, Hye Jin Cho, Dong Gun Park, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, and Jong-Ho Lee, "Characteristics of P-channel Ω SONOS Flash Memory Device Based on Body-Tied Tri-Gate MOSFETs,” IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 153-154, June 13-14, 2004.[INTL]  [DOWNLOAD]
  221. Jung Im Huh, Dae Hwan Kim, Kyung Rok Kim, Hyun Ho Kim, Ki-Whan Song, Jong Duk Lee and Byung-Gook Park, "Coupled Parallel Quantum Dots in Silicon Single-Electron Transistors by the Three-Dimensional Field Effects," IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 83-84, June 13-14, 2004.[INTL]  [DOWNLOAD]
  222. Hyun Ho Kim, Kyung Rok Kim, Jung-Im Huh, Ki-Whan Song, Il-Han Park, Jong Duk Lee and Byung-Gook Park, "Room Temperature Characteristics in Single-Electron Transistors with a Quantum Dot Formed by Anisotropic TMAH Wet Etch,” IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 79-80, June 13-14, 2004.[INTL]  [DOWNLOAD]
  223. Woo Young Choi, Dong-Soo Woo, Byung Yong Choi, Jong Duk Lee, and Byung-Gook Park, "A Novel Biasing Scheme for the I-MOS (Impact-Ionization MOS),” IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 61-62, June 13-14, 2004.[INTL]  [DOWNLOAD]
  224. Junsoo Kim, Sangyeon Han, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "MOSFETs with Biased Spacer Having Work-function Different From the Gate,” IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 49-50, June 13-14, 2004.[INTL]  [DOWNLOAD]
  225. Byung Yong Choi, Woo Young Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "INverted-Sidewall and Partially-Etched Channel (INSPEC) MOSFET on Fully Depleted SOI Substrates,” IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 31-32, June 13-14, 2004.[INTL]  [DOWNLOAD]
  226. Kyung Rok Kim, Hyun Ho Kim, Jung-Im Huh, Dae Hwan Kim, Ki-Whan Song, Jong Duk Lee, and Byung-Gook Park, "Field Induced Band-to-Band Tunneling Effect Transistor - FIBTET with Negative-Differential Transconductance and Negative-Differential Conductance Characteristics,” IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 11-12, June 13-14, 2004.[INTL]  [DOWNLOAD]
  227. Cheon An Lee, Sung Hun Jin, Jin Wook Kim, In Man Kang, Jong Duk Lee, and Byung-Gook Park, "A Silicon-based One-chip PELD (Polymer Electroluminescent Display) System," The 11th Korean Conference on Semiconductors, Seoul, Korea, vol. 2, pp. 417-418, Feb. 19-20, 2004.   [DOWNLOAD]
  228. Hyung Soo Uh, Soo Myun Lee, Pil Goo Jeon, Byung Hwak Kwak, Sang Sik Park, Sang Jik Kwon, Sung Woo Ko, Euo Sik Cho, Jong Duk Lee, and Chun Gyoo Lee, "Fabrication and Characterization of Triode-type Field Emitter Arrays Using Selectively Grown Carbon Nanotubes," The 11th Korean Conference on Semiconductors, Seoul, Korea, vol. 2, pp. 379-380, Feb. 19-20, 2004.   [DOWNLOAD]
  229. Junsoo Kim, Sangyeon Han, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Biased Spacer MOSFETs Suitable for High Packing Density," The 11th Korean Conference on Semiconductors, Seoul, Korea, vol. 2, pp. 261-262, Feb. 19-20, 2004.   [DOWNLOAD]
  230. Hyuck In Kwon, O Jun Kwon, In Man Kang, Myung Won Lee, Hyungcheol Shin, Byung-Gook Park, Woo Suk Hyun, Sang Sik Park, and Jong Duk Lee, "The Influence of Deuterium Annealing on the Evolution of Interface Trap Capture Cross Sections in n-MOSFET under Channel-Hot-Electron and Fowler-Nordheim Stresses," The 11th Korean Conference on Semiconductors, Seoul, Korea, vol. 2, pp. 243-244, Feb. 19-20, 2004.   [DOWNLOAD]
  231. Hyun Sil Oh, Ki-Whan Song, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, Won-Hyung Pong, Jong Mok Park, Jung Hwan Choi, and Chang-Hyun Kim, "The Modified SCR as an ESD Protection Device for High Performance I/O," The 11th Korean Conference on Semiconductors, Seoul, Korea, vol. 2, pp. 227-228, Feb. 19-20, 2004.   [DOWNLOAD]
  232. Il Hwan Cho, Tai-su Park, Dong Gun Park, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, and Jong-Ho Lee, "Characterisitics of P-type Ω SONOS Flash Memory Device Based on Body-Tied Tri-Gate MOSFETs," The 11th Korean Conference on Semiconductors, Seoul, Korea, vol. 2, pp. 213-214, Feb. 19-20, 2004.   [DOWNLOAD]
  233. Woo Young Choi, Hwi Kim, Dong-Soo Woo, Byung Yong Choi, Byoungho Lee, Jong Duk Lee, and Byung-Gook Park, "A New Stable Threshold Voltage Extraction Method Using the Regularization Theory," The 11th Korean Conference on Semiconductors, Seoul, Korea, vol. 2, pp. 205-206, Feb. 19-20, 2004.   [DOWNLOAD]
  234. Dong-Soo Woo, Jihye Kong, Hyun Ho Kim, Woo Young Choi, Byung Yong Choi, Jong Duk Lee, Byung-Gook Park, "Low Resistance 30nm Self-Aligned FinFET," The 11th Korean Conference on Semiconductors, Seoul, Korea, vol. 2, pp. 203-204, Feb. 19-20, 2004.   [DOWNLOAD]
  235. Yong Kyu Lee, Ki Whan Song, Il Han Park, Jong Duk Lee and Byung Gook Park, Sung Taeg Kang, Jeong Dong Choe, Sang Yeon Han, Jeong Nam Han, Sung Woo Lee, O Ik Kwon, Chilhee Chung, Donggun Park, and Kinam Kim, "30-nm Twin Silicon-Oxide-Nitride-Oxide-Silicon(SONOS) Memory (TSM) with Low Voltage (4.0 V) Operation and High Reliability," The 11th Korean Conference on Semiconductors, Seoul, Korea, vol. 2, pp. 201-202, Feb. 19-20, 2004.   [DOWNLOAD]
  236. Gwanghyeon Baek, Ki-Whan Song, Yong Kyu Lee, Kyung Rok Kim, Byung Yong Choi, Jong Duk Lee, Byung-Gook Park, 박주온, 이성우, 김명철, 고형호, 한정남, 유영섭, 진유승, 이동훈, 김영욱, "Fabrication of Single-Electron Transistors and CMOS Devices on a SOI Wafer," The 11th Korean Conference on Semiconductors, Seoul, Korea, vol. 1, pp. 387-388, Feb. 19-20, 2004.   [DOWNLOAD]
  237. Jin Wook Kim, Sung Hun Jin, Cheon An Lee, Hyungcheol Shin, Byung-Gook Park, and Jong Duk Lee, "Thermal Degradation Effects on the Performance of OTFTs During the Patterning of Pentacene by PVA-photoresist," The 11th Korean Conference on Semiconductors, Seoul, Korea, vol. 1, pp. 37-38, Feb. 19-20, 2004.   [DOWNLOAD]
  238. Jae Sung Sim, Jong Duk Lee, and Byung-Gook Park, "Simulation of Single-Charging Effect in Nanocrystal Memories," IEEE Nanoscale Devices and System Integration, Miami, Florida, U.S.A, pp. 31, Feb. 15-19, 2004.[INTL]  [DOWNLOAD]
  239. Yong Kyu Lee, Jae Sung Sim, Suk Kang Sung, Tae Hoon Kim, Jong Duk Lee, and Byung-Gook Park, Sung Taeg Kang, Chilhee Chung, Donggun Park, and Kinam Kim, "Excellent 2-bit Silicon-Oxide-Nitride-Oxide-Silicon(SONOS) Memory (TSM) with a 90-nm Merged-Triple Gate," International Semiconductor Device Research Symposium, pp.489-490, Washington, USA, Dec. 10-12, 2003.[INTL]  [DOWNLOAD]
  240. Kyung Rok Kim, Ki-Whan Song, Gwanghyeon Baek, Hyun Ho Kim, Jung Im Huh, Jong Duk Lee, Byung Gook Park, "Silicon MOSFET-based Field-Induced Band-to-band Tunneling Effect Transistor - FIBTET," International Semiconductor Device Research Symposium, pp.522-523, Washington, USA, Dec. 10-12, 2003.[INTL]  [DOWNLOAD]
  241. E. S. Cho, S. J. Kwon, H. S. Uh, B-G. Park, and J. D. Lee, "Effect of Phosphorus Implantation and Subsequent Growth on Diamond," International Conference on Materials for Advanced Technologies, pp.579-579, Singapore, Singapore, December 7-12, 2003.[INTL]  [DOWNLOAD]
  242. H. S. Uh, S. M. Lee, P. G. Jeon, B. H. Kwak, S. S. Park, S. J. Kwon, S. W. Ko, E. S. Cho, and J. D. Lee, "Selective Growth of Carbon Nanotubes and Their Application to Field Emitter Arrays," International Conference on Materials for Advanced Technologies, pp.556-556, Singapore, Singapore, December 7-12, 2003.[INTL]  [DOWNLOAD]
  243. Sang Jik Kwon, Tae Ho Kim, Byeong Kyoo Shon, Euo Sik Cho, Jong Duk Lee, Hyung Soo Uh, Sung Hee Cho, and Chun Gyoo Lee, "2 inch CNT-FED Fabricated by using a Screen Printing Method and a Vacuum In-Line Sealing Technology," The 10th International Display Workshops, pp.1259-1262, Fukuoka, Japan, December 3-5, 2003.[INTL]  [DOWNLOAD]
  244. [Invited]Byung-Gook Park, Dae Hwan Kim, Kyung Rok Kim, Ki-Whan Song, and Jong Duk Lee, "Single-Electron Transistors Fabricated with Sidewall Spacer Patterning," 6th International Conference on New Phenomena in Mesoscopic Structures 6 Surfaces and Interfaces in Mesoscopic Devices 4, pp.108-109, Hawaii, USA, Nov. 30-Dec. 5, 2003.[INTL]  [DOWNLOAD]
  245. Hyung Soo Uh, Soo Myun Lee, Pilgoo Jun, Byung Hwak Kwak, Sang Sik Park, Sang Jik Kwon, Sung Woo Ko, Euo Sik Cho, and Jong Duk Lee, "Triode type Field Emitter Arrays using Selectively Grown Carbon Nanotubes," 204th meeting of the Electrochemical Society, Abs#1174, Orlando, Florida, USA, October 12-16, 2003.[INTL]  [DOWNLOAD]
  246. [Invited]B.-G. Park, D.-S. Woo, J.D.Lee, "Self-Aligned FinFETs with Wide Source/Drain Regions," The 8th IUMRS International Conference on Advanced Materials, pp.111-111, Yokohama, Japan, October 8-13, 2003.[INTL]  [DOWNLOAD]
  247. Jae Sung Sim, Jihye Kong, Jong Duk Lee, Byung-Gook Park, "Monte-Carlo Simulation of Single-Electron Nanocrystal Memories," Int'l Conf. on Solid State Devices and Materials 2003, pp.850-851, Tokyo, Japan, Sept. 16-18, 2003.[INTL]  [DOWNLOAD]
  248. Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Myeong Won Lee, Jong Duk Lee, and Byung-Gook Park, "A New Stable Extraction of Threshold Voltage Using Regularization Method," Int'l Conf. on Solid State Devices and Materials 2003, pp.420-421, Tokyo, Japan, Sept. 16-18, 2003.[INTL]  [DOWNLOAD]
  249. Kyung Rok Kim, Ki-Whan Song, Gwanghyeon Baek, Hyun Ho Kim, Jung Im Huh, Jong Duk Lee, Byung Gook Park, "Analytical SPICE Modeling of Realistic MOS-based Single-Electron Transistors-"MOSETs" with a Unique Distirbution Function in the Coulomb Oscillation Region," Int'l Conf. on Solid State Devices and Materials 2003, pp.330-331, Tokyo, Japan, Sept. 16-18, 2003.[INTL]  [DOWNLOAD]
  250. Soo Doo Chae, Chang Ju Lee, Ju Hyung Kim, Suk Kang Sung, Jae Seong Sim, Moon Kyung Kim, Se Wook Yoon, Youn Seok Jeong, Won Il Ryu, Tae Hun Kim, Byung-Gook Park, Jo Won Lee and Chung Woo Kim, "70 nm SONOS Nonvolatile Memory Devices using FN Programming and Hot Hole Erase Method," Int'l Conf. on Solid State Devices and Materials 2003, pp.206-207, Tokyo, Japan, Sept. 16-18, 2003.[INTL]  [DOWNLOAD]
  251. Woo Young Choi, Jong Duk Lee, Byung-Gook Park, "Reverse-Order Source/Drain Formation with Double Offset Spacer (RODOS) for CMOS Low-power, High-Speed and Low-Noise Amplifiers," 2003 International Symposium on Low Power Electronics and Design (ISLPED 2003), pp.189-192, Seoul, Korea, August 25-27, 2003.[INTL]  [DOWNLOAD]
  252. Ki-Whan Song, Gwanghyeon Baek, Sang-Hoon Lee, Dae Hwan Kim, Kyung Rok Kim, Dong-Soo Woo, Jae Sung Sim, Jong Duk Lee, and Byung-Gook Park, "Realistic Single-Electron Transistor Modeling and Novel CMOS/SET Hybrid Circuits," 2003 Thrid IEEE Conference on Nanotechnology(IEEE-NANO 2003), pp.119-121, San Francisco, California, USA, August 12-14, 2003.[INTL]  [DOWNLOAD]
  253. Sang Jik Kwon, Tae Ho Kim, Byeong Kyoo Shon, Ji Hoon Kim, Euo Sik Cho, Jong Duk Lee, Hyung Soo Uh, and Chun Gyoo Lee, "A vacuum In-line sealing technology of the screen printed CNT-FEA," Field Emission Workshop '03, pp.261-265, August 13-16, 2003.  [DOWNLOAD]
  254. Euo Sik Cho, Sung Woo Ko, Hyung Soo Uh, Sang Jik Kwon, Byung-Gook Park, and Jong Duk Lee, "Effects of phosphorus Implantation and subsequent growth on surface morphologies and field emission properties of diamond," Field Emission Workshop '03, pp.172-177, August 13-16, 2003.  [DOWNLOAD]
  255. Cheon An Lee, Hyuck In Kwon, Sung Hun Jin, Chang Ju Lee, Myung Won Lee, Jae Woo Kyung, Il Whan Cho, Jong Duk Lee, and Byung-Gook Park, "High voltage MOSFET fabricated by using a standard CMOS logic process to drive the top emission OLEDs in silicon-based OELDs," The 3rd International Meeting on Information Display, pp.981-983, Taegu, Korea, July 9-11, 2003.[INTL]  [DOWNLOAD]
  256. Sang Jik Kwon, Tae Ho Kim, Euo Sik Cho, Byeong Kyoo Shon, Hyung Soo Uh, Jong Duk Lee, Sung Hee Cho, Chun Gyoo Lee, "Characterization of the 2 inch CNT-FED Fabricated by using a Vacuum In-Line Sealing Technology," The 3rd International Meeting on Information Display, pp.870-873, Taegu, Korea, July 9-11, 2003.[INTL]  [DOWNLOAD]
  257. Hyung Soo Uh, Soo Myun Lee, Pil Goo Jeon, Byung Hwak Kwak, Sang Sik Park, Euo Sik Cho, Jong Duk Lee and Sang Jik Kwon, "The Sturcture and Electircal Characteristics of CNTs Depending on the Hydrogen Plasma Treatment," The 3rd International Meeting on Information Display, pp.855-858, Taegu, Korea, July 9-11, 2003.[INTL]  [DOWNLOAD]
  258. Sung Hun Jin, Jin Wook Kim, Cheon An Lee, Byung-Gook Park, and Jong Duk Lee, "Pentacene OTFTs with Al2O3 gate insulator by Atomic Layer Deposition Process," The 3rd International Meeting on Information Display, pp.15-18, Taegu, Korea, July 9-11, 2003.[INTL]  [DOWNLOAD]
  259. Cheon An Lee, Yong Jin Yoon, Sung Hun Jin, Jin Wook Kim, Hyuck In Kwon, Jong Duk Lee, and Byung-Gook Park, "A new driving circuit for the low power and reduced layout area in silicon based AM-OELDs," The 3rd International Meeting on Information Display, pp.11-14, Taegu, Korea, July 9-11, 2003.[INTL]  [DOWNLOAD]
  260. Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Reverse-Order Source/Drain with Double Offset Spacer (RODOS) for Sub-50nm Low-Power and High-Speed MOSFET Design," 2003 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Busan, Korea, pp. 51-54, June 30-July 2 2003. [INTL]  [DOWNLOAD]
  261. Myeong Won Lee, In Man Kang, Byung Yong Choi, Dong-Soo Woo, Woo Young Choi, Jong Duk Lee, and Byung-Gook Park, "Juncion Leakage Characteristics of Shallow Trench Isolation (STI) with Nitrogen Pile-Up Sidewall Oxide," 2003 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Busan, Korea, pp. 5-8, June 30-July 2 2003. [INTL]  [DOWNLOAD]
  262. Il Hwan Cho, Tai-su Park, Si Young Choi, Jong Duk Lee, and Jong-Ho Lee, "Body-Tied double-Gate SONOS Flash (Omega Flash) Memory Device Built on Bulk Si Wafer,” 61st Annual Device Research Conference, pp. 133-134, Salt Lake, Utah, USA, June. 23-25, 2003.[INTL]  [DOWNLOAD]
  263. Sung Hun Jin, Yong Kyu Lee, Cheon An Lee, Jin Wook Kim, Byung-Gook Park, and Jong Duk Lee, "A Nonvolatile Pentacene Organic Memory (PENTOM) with a Triple-layer Gate Insulator on a Flexible Substrate,” 61st Annual Device Research Conference, pp. 185-186, Salt Lake, Utah, USA, June. 23-25, 2003.[INTL]  [DOWNLOAD]
  264. Byung-Gook Park, "나노 CMOS의 현황과 전망," 제4회 고유전체 및 강유전체 소자/재로 Workshop, pp.9-10, June 20, 2003.  [DOWNLOAD]
  265. Yong Kyu Lee, Tae Hun Kim, Sang Hoon Lee, Jong Duk Lee, and Byung-Gook Park, "Twin-Bit Silicon-Oxide-Nitride-Oxide-Silicon(SONOS) Memory by Inverted Sidewall Patterning (TSM-ISP)”, IEEE 2003 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 92-93, June 8-9, 2003. [INTL]  [DOWNLOAD]
  266. Kyung Rok Kim, Dae Hwan Kim, Ki-Whan Song, Sang-Hoon Lee, Jaewoo Kyung, Jong Duk Lee, and Byung-Gook Park, "Observation of Single-Electron Charging Effects Based on Band-to-band Tunneling in a MOS-based Single-Electron Transistor-"MOSET" ”, IEEE 2003 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 72-73, June 8-9, 2003. [INTL]  [DOWNLOAD]
  267. Dong-Soo Woo, Byung Yong Choi, Woo Young Choi, Jong Duk Lee, and Byung-Gook Park, "Self-Aligned FinFET with Large Source/Drain Fan-Out Strucure”, IEEE 2003 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 66-67, June 8-9, 2003. [INTL]  [DOWNLOAD]
  268. Suk-Kang Sung, Chang Ju Lee, Yong Kyu Lee, Jong Duk Lee, and Byung-Gook Park, "Program/Erase Characteristics of Nanoscale SONOS Memory and Feasibility of Multi-Level Operation in Multi-Layer SONOS”, IEEE 2003 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 58-59, June 8-9, 2003. [INTL]  [DOWNLOAD]
  269. Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Sub-50nm MOSFET with Reverse-Order Source/Drain with Double Offset Spacer (RODOS)”, IEEE 2003 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 22-23, June 8-9, 2003. [INTL]  [DOWNLOAD]
  270. S. H. Jin, J. S. Yu, J. W. Kim, C. A. Lee, B.-G. Park, and J. D. Lee, J. H. Lee, "PMMA Buffer-Layer Effects on Electrical Performance of Pentacene OTFTs with a Cross-linked PVA Gate Insulator on a Flexible Substrate," SID 2003 Digest, pp. 1088-1091, Baltimore, U.S.A., May 18-23, 2003. [INTL]  [DOWNLOAD]
  271. Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "A New Linearity Measurement Algorithm for Sub-Micron Microwave CMOS," 20th IEEE Instrumentation and Measurement Technology Conference, Vail Colorado, USA, pp. 374-376, May 20-22, 2003. [INTL]  [DOWNLOAD]
  272. Ki-Whan Song, Sang Hoon Lee, Dae Hwan Kim, Kyung Rok Kim, Jaewoo Kyung, Gwanghyeon Baek, Chun-An Lee, Jong Duk Lee, and Byung-Gook Park, "Complementary Self-Biased Scheme for the Robust Design of CMOS/SET Hybrid Multi-Valued Logic," 33rd International Symposium on Multiple-Valued Logic, Tokyo, Japan, pp.267-272, May 16-19, 2003. [INTL]  [DOWNLOAD]
  273. Hyuck In Kwon, In Man Kang, Byung-Gook Park, Jong Duk Lee, and Sang Sik Park, "Dark Current Characterization of the CMOS APS Imagers Fabricated Using a 0.18 um CMOS Technology," 2003 IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors, Elmau, Germany, pp. 0-0, May 15-17, 2003. [INTL]  [DOWNLOAD]
  274. Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Stable Extraction of Threshold Voltage Using Transconductance Change Method," 203rd ECS Meeting, Paris, France, pp. 27, April 27-May 2, 2003. [INTL]  [DOWNLOAD]
  275. Euo Sik Cho, Byung-Gook Park, Jong Duk Lee, Sang Jik Kwon, and Hyung Soo Uh, "Effect of Phosphorus Implantation on Growth and Field Emission Properties of Diamond," The 10th Korean Conference on Semiconductors, Seoul, Korea, pp. 835-836, Feb. 27-28, 2003.   [DOWNLOAD]
  276. Il Hwan Cho, Tai-su Park, Si Young Choi, Jong Duk Lee, and Jong-Ho Lee, "Body-Tied Double-Gate SONOS Flash (Omega Flash) Memory on Bulk Si," The 10th Korean Conference on Semiconductors, Seoul, Korea, pp. 731-732, Feb. 27-28, 2003.   [DOWNLOAD]
  277. In Man Kang, Hyuck In Kwon, Myung Won Lee, Byung-Gook Park, Jong Duk Lee, Sang Sik Park, Jung Chak Ahn, and Yong Hee Lee, "Characteristics of the STI Process-Related Deep Level Traps in Silicon," The 10th Korean Conference on Semiconductors, Seoul, Korea, pp. 617-618, Feb. 27-28, 2003.   [DOWNLOAD]
  278. Chang Ju Lee, Suk-Kang Sung, Yong Kyu Lee, Kyung Rok Kim, Jae Seong Sim, Tae Hun Kim, Ji Hye Kong, Jong Duk Lee, and Byung-Gook Park, "70-nm-long and 30-nm-wide Channel SONOS Memory Fabricated on an SOI Wafer," The 10th Korean Conference on Semiconductors, Seoul, Korea, pp. 581-582, Feb. 27-28, 2003.   [DOWNLOAD]
  279. Cheon An Lee, Sung Hun Jin, Yong Jin Yoon, Jin Wook Kim, Jong Duk Lee, and Byung-Gook Park, "A New Column Driving Technique and the DAC Enable Signal Generation Circuit for a Silicon Based OELD," The 10th Korean Conference on Semiconductors, Seoul, Korea, pp. 517-518, Feb. 27-28, 2003.   [DOWNLOAD]
  280. Jae-Sung Yu, Sung Hun Jin, Jin Wook Kim, Cheon An Lee, Byung-Gook Park, and Jong Duk Lee, "Pentacene OTFTs with PVA Gate Insulators on a Flexible PET Substrate," The 10th Korean Conference on Semiconductors, Seoul, Korea, pp. 497-498, Feb. 27-28, 2003.   [DOWNLOAD]
  281. Sung-Hun Jin, Jin Wook Kim, Jae-Sung Yu, Cheon An Lee, Byung-Gook Park and Jong Duk Lee, "Surface State Modification of a Gate Insulator by a Diluted PMMA Solution And Its Application to Pentacene OTFTs," The 10th Korean Conference on Semiconductors, Seoul, Korea, pp. 485-486, Feb. 27-28, 2003.   [DOWNLOAD]
  282. Hyuck In Kwon, In Man Kang, Byung-Gook Park, Jong Duk Lee, Sang Sik Park, Jung Chak Ahn, and Yong Hee Lee, "Electrical Stress Induced Mid-Gap Interface Traps from Pulsed Interface Probing Measurements on n-MOSFETs," The 10th Korean Conference on Semiconductors, Seoul, Korea, pp. 357-358, Feb. 27-28, 2003.   [DOWNLOAD]
  283. Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Reverse-Order Source/Drain with Double Offset Spacer (RODOS) for Sub-50nm Low-Power and High-Speed MOSFET Design," The 10th Korean Conference on Semiconductors, Seoul, Korea, pp. 309-310, Feb. 27-28, 2003.   [DOWNLOAD]
  284. Sang-Hoon Lee, Ki-Whan Song, Dae Hwan Kim, Kyung Rok Kim, Jong Duk Lee, Byung-Gook Park, Young-Jin Gu, Gi-Young Yang, Young-Kwan Park, and Jeong-Taek Kong, "A SPICE Model of Realistic Single-Electron Transistors and its Application to Multiple-Valued Logic," The 10th Korean Conference on Semiconductors, Seoul, Korea, pp. 109-110, Feb. 27-28, 2003.   [DOWNLOAD]
  285. Chang Ju Lee, Suk-Kang Sung, Yong Kyu Lee, Kyung Rok Kim, Jae Seong Sim, Tae Hun Kim, Ji Hye Kong, Jong Duk Lee, and Byung-Gook Park, Soo doo Chae, and Chung woo Kim, "70-nm-long and 30-nm-wide Channel SONOS Memory Fabricated on an SOI Wafer," IEEE Non-Volatile Semiconductor Memory Workshop, Monterey, California, U.S.A, pp. 69-70, Feb. 16-20, 2003.[INTL]  [DOWNLOAD]
  286. Jong Duk Lee, Woo Young Choi, Byung Yong Choi, Young Jin Choi, Dong-Soo Woo, and Byung-Gook Park, "30 nm MOSFET Development Based on Processes for Nanotechnology," 2002 IEEE International Conference on Semiconductor Electronics (ICSE2002), pp. 251-254, Penang, Malaysia, Dec. 19-21, 2002. [INTL]  [DOWNLOAD]
  287. Jae Sung Sim, Yong Kyu Lee, Jong Duk Lee, and Byung-Gook Park, "Observation of the Lateral Redistribution of Locally Trapped Charge in SONOS Memory Cells," International Semiconductor Technology Conference 2002, Abstract No. 41, Tokyo, Japan, September 12-14, 2002.[INTL]  [DOWNLOAD]
  288. Jong Duk Lee, Byung Chang Shim, Byung Gook Park, "Vacuum Dependency of Si, Co Silicide and Mo Silicide FEAs," The 2nd International Meeting on Information Display, pp.685-688, Taegu, Korea, August 21-23, 2002.[INTL]  [DOWNLOAD]
  289. Jong Duk Lee, Chang woo Oh, Jae Woo Park, and Byung Gook Park, "Thermal Effects of Single Silicon Tip Emitters with Various Tip Radii," The 2nd International Meeting on Information Display, pp.681-684, Taegu, Korea, August 21-23, 2002.[INTL]  [DOWNLOAD]
  290. Jong Duk Lee, Chang Woo Oh, and Byung Gook Park, "Thermal Effects of Single Si Tip Emitters with Various Tip Radii," Field Emission Workshop '02, pp.276-281, July 25-27, 2002.  [DOWNLOAD]
  291. Yong Jin Yoon, Jong Duk Lee, Byung Gook Park, Nam Seog Kim, Uk Rae Cho and Hyun Gun Byun, "Synchronous Mirror Delay for Multi-phase Locking," 2002 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sapporo, Japan, pp. 33-36, July 2002. [INTL]  [DOWNLOAD]
  292. S. W. Hwang, B.-G. Park, and D. Ahn, "Nano-electronics Technology - Fabrication and characterization of various quantum dot devices," 2002 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sapporo, Japan, pp. 277-280, July 1-3, 2002. [INTL]  [DOWNLOAD]
  293. Sang Jik Kwon, Euo Sik Cho, Byung-Gook Park, and Jong Duk Lee, "Characteristics of Phosphorus Implanted Mold type Diamond FEAs," Joint International Plasma Symposium of 6th APCPST, 15th SPSM, OS 2002 & 11th KAPRA, Jeju Island, Korea, pp. 412, July 2002. [INTL]  [DOWNLOAD]
  294. Yong Kyu Lee, Suk Kang Sung, Jae Seong Sim, Chang Ju Lee, Tae Hun Kim, Sang Hun Lee, Jong Duk Lee, Byung Gook Park, Dong Hun Lee and Young Wuk Kim, "Multi-Level Vertical Channel SONOS Nonvolatile Memory on SOI", 2002 Symposium on VLSI Technology, Honolulu, Hawaii, U.S.A, pp. 208-209, June 11-13, 2002.[INTL]  [DOWNLOAD]
  295. Dong-Soo Woo, Jong-Ho Lee, Woo Young Choi, Byung-Yong Choi, Young-Jin Choi, Jong Duk Lee and Byung-Gook Park, "Electrical Characteristics of of FinFET with Vertically Non-Uniform S/D Doping Profile”, IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 23-24, June 9-10, 2002.[INTL]  [DOWNLOAD]
  296. S. K. Sung, Y.K.Lee, J.S.Sim, J.D.Lee, S.K.Kim, S.T.Kang, J.U.Han, and B.-G.Park, "Multi-Layer SONOS with Direct Tunnel Oxide for High Speed and Long Retention Time”, IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 83-84, June 9-10, 2002.[INTL]  [DOWNLOAD]
  297. Jae Sung Sim, Suk Kang Sung, Dong-Hyuk Chae, Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Programming Characteristics of Single Quantum Dot and Nanocrystal Memories”, IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 65-66, June 9-10, 2002.[INTL]  [DOWNLOAD]
  298. Sang Hoon Lee, Dae Hwan Kim, Kyung-Rok Kim, Jong Duk Lee, and Byung-Gook Park, "A Practival SPICE Model Based on Realistic Single-Electron Transisor”, IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 77-78, June 9-10, 2002.[INTL]  [DOWNLOAD]
  299. Young Jin Choi, Byung Yong Choi, Dong-Soo Woo, Kyung Rok Kim, Woo Young Choi, Cheon Ahn Lee, Jong Duk Lee, and Byung-Gook Park, "A New Side-gate nMOSFET with 50nm Gate Length”, IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 13-14, June 9-10, 2002.[INTL]  [DOWNLOAD]
  300. Kyung Rok Kim, Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Room Temperature Negative Differential Conductance Characteristics in 30-nm Square Channel Silicon-On-Insulator n-MOSFETs”, IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 9-10, June 9-10, 2002.[INTL]  [DOWNLOAD]
  301. Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook Park, "Single-Electron Transisters Based on Gate-Induced Si Island for Single-Electron Logic Application”, IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 57-58, June 9-10, 2002.[INTL]  [DOWNLOAD]
  302. Jong-Ho Lee, Sung-In Hong, Jong Duk Lee, and Byung-Gook Park, "Recessed Double-Gate MOSFETs for sub-30 nm CMOS Technology," IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 7-8, June 9-10, 2002. [INTL]  [DOWNLOAD]
  303. Woo Young Choi, Byung Yong Choi, Young Jin Choi, Dong-Soo Woo, Suk-Kang Sung, Cheon An Lee, Kyung-Hoon Chung, Jong Duk Lee, and Byung-Gook Park, "Development of Ultra-Fine Process Technologies and Their Application to 30nm nMOSFETs," The 9th Korean Conference on Semiconductors, Chunan, Korea, pp. 61-62, Feb. 21-22, 2002.   [DOWNLOAD]
  304. Young Jin Choi, Byung Yong Choi, Dong-Soo Woo, Kyung Rok Kim, Woo Young Choi, Cheon Ahn Lee, Jong Duk Lee, and Byung-Gook Park, "A New 50nm nMOSFET with Side-Gates for Virtual Source/Drain Extension," The 9th Korean Conference on Semiconductors, Chunan, Korea, pp. 65-66, Feb. 21-22, 2002.   [DOWNLOAD]
  305. Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook Park, "Single-Electron Transistors with Sidewall Depletion Gates on an SOI Nanowire and Their Application to Single-Electron Inverter," The 9th Korean Conference on Semiconductors, Chunan, Korea, pp. 91-92, Feb. 21-22, 2002.   [DOWNLOAD]
  306. Yong Kyu Lee, Suk Kang Sung, Jae Seong Sim, Jong Duk Lee and Byung Gook Park Dong Hun Lee, Hyuk Ju Ryu,Young Wuk Kim, "Vertical Channel SONOS Nonvolatile Memory with SOI Technology," The 9th Korean Conference on Semiconductors, Chunan, Korea, pp. 317-318, Feb. 21-22, 2002.   [DOWNLOAD]
  307. Jong Duk Lee, Cheol Shin Kwak, Yong Jin Yoon, and Byung-Gook Park, "The characteristics of threshold voltage mismatch for short channel NMOS differential pairs," The 9th Korean Conference on Semiconductors, Chunan, Korea, pp. 503-504, Feb. 21-22, 2002.   [DOWNLOAD]
  308. Dong Soo Woo, Jong Ho Lee, Woo Young Choi, Byung Yong Choi, Young Jin Choi, Jong Duk Lee, and Byung-Gook Park, "Design of Self-Aligned Double-Gate MOSFET with Low Source/Drain Resistance," The 9th Korean Conference on Semiconductors, Chunan, Korea, pp. 573-574, Feb. 21-22, 2002.   [DOWNLOAD]
  309. Il Hwan Cho, Jong Ho Lee, Byung-Gook Park, and Jong Duk Lee, "Nano scale SONOS memory with double-gate MSOFET structure," The 9th Korean Conference on Semiconductors, Chunan, Korea, pp. 779-780, Feb. 21-22, 2002.   [DOWNLOAD]
  310. Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Bum Ho Choi, Sung Woo Hwang, Doyeol Ahn, Jong Duk Lee, and Byung-Gook Park, "Si Single-Electron Transistors with Sidewall Depletion Gates and their Application to Dynamic Single-Electron Transistor Logic”, International Electron Devices Meeting, Washington DC, U.S.A., pp. 151-154, Dec. 2~5, 2001.[INTL]  [DOWNLOAD]
  311. T. H. Kim, H. I. Kwon, J. D. Lee, and B.-G. Park, "Thickness Measurements of Ultra-thin Films Using AFM," 2001 Int'l Microprocesses and Nanotechnology Conference, pp.240-241, Shimane, Japan, Oct. 31 - Nov. 2, 2001.[INTL]  [DOWNLOAD]
  312. K.-H. Chung, S. K. Sung, J. D. Lee, and B.-G. Park, "Ultra Fine Multi-Line Patterning Based on Sidewall Patterning Technique," 2001 Int'l Microprocesses and Nanotechnology Conference, pp.186-187, Shimane, Japan, Oct. 31 - Nov. 2, 2001.[INTL]  [DOWNLOAD]
  313. K. R. Kim, D. H. Kim, S. K. Sung, J. D. Lee, B.-G. Park, B. H. Choi, S. W. Hwang, and D. Ahn, "Single Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Nano-Wire," Int'l Conf. on Solid State Devices and Materials 2001, pp.552-553, Tokyo, Japan, Sept. 26-28, 2001.[INTL]  [DOWNLOAD]
  314. S. K. Sung, J. S. Sim, D. H. Kim, J. D. Lee, and B.-G. Park, "Single Electron Memory with a Defined Poly-Si Dot Based on Conventioanl VLSI Technology," Int'l Conf. on Solid State Devices and Materials 2001, pp.432-433, Tokyo, Japan, Sept. 26-28, 2001.[INTL]  [DOWNLOAD]
  315. W. Y. Choi, B. Y. Choi, J. D. Lee, and B.-G. Park, "Side-Gate Design for 50nm Electrically Induced Source/Drain MOSFETs," Int'l Conf. on Solid State Devices and Materials 2001, pp.154-155, Tokyo, Japan, Sept. 26-28, 2001.[INTL]  [DOWNLOAD]
  316. B. Y. Choi, W. Y. Choi, Y. J. Choi, J. D. Lee, and B.-G. Park, "Design of 50nm MOSFETs with Biased Side-Gates," 31th European Solid-State Device Research Conference, pp.287-290, Nuremberg, Germany, Sept. 11-13, 2001.[INTL]  [DOWNLOAD]
  317. Jong Duk Lee, Chang Woo Oh, Jae Woo Park, Byung Gook Park, and Il Hwan Kim, "Evaluation of MOSFET-Controlled Field Emission Display (MCFED) in a High Vacuum Chamber," The 1st International Meeting on Information Display, pp.179-182, Taegu, Korea, August 29-31, 2001.[INTL]  [DOWNLOAD]
  318. Cheon An Lee, Jong Duk Lee, and Byung-Gook Park, "Design of a CMOS On-chip Driver Circuit for Active Matrix Polymer Electroluminescent Displays," The 1st International Meeting on Information Display, pp.330-333, Taegu, Korea, August 29-31, 2001.[INTL]  [DOWNLOAD]
  319. Jong Duk Lee, Hyuck In Kwon, Jung Hyun Nam, Byung Chang Shim, and Byung-Gook Park, "Design of One-Chip FED System based on a Standard CMOS Process," The 1st International Meeting on Information Display, pp.543-546, Taegu, Korea, August 29-31, 2001.[INTL]  [DOWNLOAD]
  320. Jong Duk Lee, Euo Sik Cho, Byung-Gook Park, and Sang Jik Kwon, "Field Emission Properties of Phosphorus doped Diamond Films by Various Ion Implantation Conditions," The 1st International Meeting on Information Display, pp.589-592, Taegu, Korea, August 29-31, 2001.[INTL]  [DOWNLOAD]
  321. Jong Duk Lee, Hyuck In Kwon, Jung Hyun Nam, Byung Chang Shim, and Byung Gook Park, "Design of One-Chip FED on a Standard CMOS Process," SID 2th Microdisplay Conference 2001, pp.83-86, Wesminster, Colorado, USA, August 13-15, 2001.[INTL]  [DOWNLOAD]
  322. Jong Duk Lee, Euo Sik Cho, Byung-Gook Park, and Sang Jik Kwon, "Properties of phosphorus implanted mold type diamond FEAs," 14th International Vacuum Microelectronics Conference 2001, pp.203-204, August 12-16, 2001.[INTL]  [DOWNLOAD]
  323. Jong Duk Lee, Euo Sik Cho, Byung-Gook Park, and Sang Jik Kwon, "Characteristics of phosphorus implanted MPCVD diamond films,"14th International Vacuum Microelectronics Conference 2001, pp.281-282, August 12-16, 2001.[INTL]  [DOWNLOAD]
  324. Jong Duk Lee, Il Hwan Kim, Chang Woo Oh, Jae Woo Park, and Byung-Gook Park, "MOSFET-Controlled Field Emission Display(MCFED)," 14th International Vacuum Microelectronics Conference 2001, pp.189-190, August 12-16, 2001.[INTL]  [DOWNLOAD]
  325. Jong Duk Lee, Chang Woo Oh, and Byung-Gook Park, "Electrical Aging of Molybdenum Field Emitter," 14th International Vacuum Microelectronics Conference 2001, pp.109-110, August 12-16, 2001.[INTL]  [DOWNLOAD]
  326. B. H. Choi, Y. S. Yu, S. H. Son, S. W. Hwang, D. Ahn, D. H. Kim, and B. G. Park, "Double-dot-like charge transport through a small size silicon single electron transistor," 10th International Conference on Modulated Semiconductor Structure, pp.211, Linz, Austria, July 23-27, 2001.[INTL]  [DOWNLOAD]
  327. B.H. CHOI, Y.S. Yu, S.H. Son, S.W. Hwang, D. Ahn, D.H. Kim and B.G. Park, "Double-dot like charge transport in silicon single electron transistor," 14th International Conference on the Electronic Properties of 2-dimensional System, part 2, pp.1101~1102, Pragh, Czech, July 30-August 3, 2001.[INTL]  [DOWNLOAD]
  328. Jong Duk Lee, Chang Woo Oh, Il Hwan Kim, and Jae Woo Park, "MOSFET-Controlled Field Emission Display (MCFED)," Field Emission Workshop 01, pp.237-241, July 26-28, 2001.  [DOWNLOAD]
  329. Euo Sik Cho, Jong Duk Lee, Byung-Gook Park, and Sang Jik Kwon, "Field Emission properties of phosphorus doped MPCVD diamond films by using ion implantation," Field Emission Workshop 01, pp.231-236, July 26-28, 2001.  [DOWNLOAD]
  330. Woo Young Choi, Suk Kang Sung, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook park, "Nanoscale Poly-Si Line Formation and Its Uniformity,” 2001 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 11-16, Cheju, Korea, July 4-7, 2001.[INTL]  [DOWNLOAD]
  331. Byung Yong Choi, Woo Young Choi, Young Jin Choi, Jong Duk Lee, and Byung-Gook park, "Side-gate Length Optimization for 50nm Induced Source/Drain MOSFETs,” 2001 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 49-54, Cheju, Korea, July 4-7, 2001.[INTL]  [DOWNLOAD]
  332. D. H. Kim, K. R. Kim, S. K. Sung, B. H. Choi, S. W. Hwang, D. Ahn, J. D. Lee, B.-G. park, "Single Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Quantum Wire,” 59th Annual Device Research Conference, pp. 133-134, Notre Dame, Indiana, USA, Jun. 25-27, 2001.[INTL]  [DOWNLOAD]
  333. Suk Kang Sung, Jae Sung Sim, Dae Hwan Kim, Jong Duk Lee, Byung-Gook park, “Nano-scale Patterning Based on Conventional VLSI Technology and Its Application to a Si Self-Aligned Quantum Dot Memory,” 2001 Silicon Nanoelectronics Workshop, pp. 20-21, Kyoto, Japan, Jun. 10-11, 2001.[INTL]  [DOWNLOAD]
  334. Kyung Rok Kim, Dae Hwan Kim, Jong Duk Lee, Byung-Gook park, “Single Electron Transistors Based on Silicon-On-Insulator Wire Patterened by Sidewall Masking Technology and Electrically Induced Tunnel Barriers,” 2001 Silicon Nanoelectronics Workshop, pp. 42-43, Kyoto, Japan, Jun. 10-11, 2001.[INTL]  [DOWNLOAD]
  335. Kyung Rok Kim, Dae Hwan Kim, Jong Duk Lee, Byung Gook park, “Characteristics of Silicon-On Insulator Single Electron Transistors with Electrically Induced Tunnel Barriers,” The 8th Korean Conference on Semiconductors, pp. 155-156, Seoul, Korea, Feb. 14-15, 2001.
  336. Tae Hun Kim, Jong Duk Lee, Byung Gook Park, “Thickness Measurements of Ultra-thin Oxides Using AFM,” The 8th Korean Conference on Semiconductors, pp. 99-100, Seoul, Korea, Feb. 14-15, 2001.
  337. Hyuck-In Kwon, Jung Hyun Nam, Byung Byung Gook Park, Jong Duk Lee, “Design and Fabrication of the Driving Circuits for One-Chip FED on Standard CMOS Process,” The 8th Korean Conference on Semiconductors, pp. 533-534, Seoul, Korea, Feb. 14-15, 2001.
  338. Dong-Soo Woo, Boo-Sik Park, Jong Duk Lee, Byung Gook Park, “Fabrication of 0.2im Ultra-thin SOI ISRC(Inverted Sidewall Recessed Channel)CMOS with Single-type Polysilicon Gate,” The 8th Korean Conference on Semiconductors, pp. 555-556, Seoul, Korea, Feb. 14-15, 2001.
  339. Suk Kang Sung, Dae Hwan Kim, , Jae-Sung Sim, Jong Duk Lee, Byung-Gook Park, “Nanoscale-wire Patterning Using Side-wall and Quantum Dot Memory Device Fabrication,” The 8th Korean Conference on Semiconductors, pp. 601-602, Seoul, Korea, Feb. 14-15, 2001.
  340. Yong Jin Yoon, Cheol-Shin Kwak, Jong Duk Lee and Byung Gook Park, “Synchronous Mirror Delay for Zero and 90 Phase locking,” The 8th Korean Conference on Semiconductors, pp. 695-696, Seoul, Korea, Feb. 14-15, 2001.
  341. Byung Yong Choi, Suk Kang Sung, Byung Gook Park and Jong Duk Lee, "70nm NMOSFET Fabrication with 12nm n+-p Junctions Using As2+ A Low Energy Ion Implantations", Solid State Devices and Materials, pp50-51, August 29-31, 2000[INTL]
  342. Sung Hun Jin, Byung Chang Shim, Byung Gook Park, and Jong Duk Lee, "A Novel Process to Form Cobalt Silicide on Single Crystal Silicon Field Emitter Arrays by Electrical Stress", International Vacuum Microelectronics Conference 2000, pp238-239 ,August 14-17, 2000[INTL]
  343. Jong Duk Lee, Euo Sik Cho and Sang Jik Kwon, "Fabrication of Triode Diamond Field Emitter Arrays on Glass Substrate by ACF Bonding", International Vacuum Microelectronics Conference 2000, pp110-111,August 14-17, 2000[INTL]
  344. Jong Duk Lee, Jung Hyun Nam, Hyuck In Kwon, Yong Jin Yoon, and Il Hwan Kim, "Design of One-Chip FED Based on Standard CMOS Process", International Vacuum Microelectronics Conference 2000, pp11-12,August 14-17, 2000[INTL]
  345. Euo Sik Cho, Jong Duk Lee, Sang Jik Kwon, Chang-Ho Lee, "Fabrication of Triode diamond field emitter arrays using self-addressable bonding(SAB)", Field Emission Workshop 00, pp245~250, July 27-29, 2000
  346. Jong Duk Lee, Sung Hun Jin, Byung Chang Shim, Byung-Gook Park, Sang Jik Kwon, "A Formation of Co Silicide on Silicon Field Arrays by Electrical Stress", Field Emission Workshop 00, pp239~244, July 27-29, 2000
  347. Jong Duk Lee, Chang Woo Oh, Sang Jik Kwon, and Byung Gook Park, "MOSFET-Controlled Single Tip Emitter", IVESC 2000 Technical Digest, H-3, July 10-13,2000[INTL]
  348. Kyung Rok Kim, Dae Hwan Kim, Jong Duk Lee. Byung Gook Park, "A study of Single Electron Logic Characterization Using a SPICE Macro-Modeling", IEEK Summer Conference 2000, pp111-114 June, 2000
  349. I.H.Nam, S.I.Hong, J.S.Sim, B.G.Park, J.D.Lee(Seoul National University), S.W.Lee, M.S.Kang, Y.W.Kim, K.P.Suh(Samsung Electronics Co.), "Nitrogen Implantation Effects on Ultra-Thin Gate Oxide Grown on Nitrogen Implanted Silicon" The Electrochemical Society, pp199-pp208 May 14-18 2000 [INTL]
  350. Jong Duk Lee, Byung Chang Shim, Sung Hun Jin and Byung-Gook Park " Mo and Co Silicide FEAs ," MRS spring meeting, pp.R4.1.1- R4.1.9, April, 2000[INTL]
  351. Sung-Hun Jin, Byung Chang Shim, Jong Duk Lee and Byung-Gook Park,, "Cobalt Silicide Formation on Silicon FEAs Using Local Heating by Field Emission," The 7th Korean Conference on Semiconductors, pp 453~454, January, 2000.
  352. Dae Hwan Kim, Dong-Hyuk Chae, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook Park, "Room Temperature SETL-Oriented Dual Gate Single Electron Transistor and its Modeling," The 7th Korean Conference on Semiconductors, pp 297~298, January, 2000.
  353. Byung Chang Shim, Jong Duk Lee and Byung-Gook Park, "Co-Silicide Formation on Silicon FEAs from Co, Co/Ti and Ti/Co Layers," The 7th Korean Conference on Semiconductors, pp 433~434, January, 2000.
  354. Yong Jin Yoon, Kyoug Hwa Lee, Jong Duk Lee, and Byung-Gook Park, "Application of Dynamic Pass-Transistor Logic to an 8-bit Multiplier," The 7th Korean Conference on Semiconductors, pp 151~152, January, 2000.
  355. Byung Yong Choi, In Ho Nam, Jong Duk Lee, and Byung Gook Park, "Sub 0.1mm NMOSFET with 12nm n+-p junction using As2 5keV ion implatation," The 7th Korean Conference on Semiconductors, pp 63~64, January, 2000.
  356. Jong Chum Park, Seung Woo Lee, In-Ho Nam, Byung-Gook Park, Jong Duk Lee, Sang Joong Jeon, Jong Hyon Ahn, Young Wug Kim, Kwang Pyuk Suh, "A Study of pMOSFET's Characteristics and Ultra-thin Gate Oxide Grown by Nitrogen Implantation and O2 Ramping-up Oxidation," The 7th Korean Conference on Semiconductors, pp 25~26, January, 2000.
  357. Chang Woo Oh, Yoo Jong Kim, Jong Duk Lee, and Byung Gook Park, "Formation of Mo-silicide on Mo Tip," Proceedings of the 1st Korean Information Display Society Conference, pp 217~218, January, 2000.
  358. Sang Jik Kwon, Kun Cho Hong, Jong Duk Lee, Ki Woong Hwang, Sun Woo Park and Yong Bum Kwon, "Vacuum In-Line Sealing by a Halogen Lamp Heating of Frit-Glass Seals for Flat Panel Display," Proceedings of the 1st Korean Information Display Society Conference, pp 147~148, January, 2000.
  359. J.S. Yoo, S. H. Cho, G. Y. Hong, and J. D. Lee, "Optical Characteristics of Spherical Phosphors for Low-Voltage FED Operation," Proceedings of the 1st Korean Information Display Society Conference, pp 143~144, January, 2000.
  360. Byung Chang Shim, Jong Duk Lee and Byung-Gook Park,"Immunity Improvement of Mo Silicidized a-Si FEA to Vacuum Environments," Proceedings of the 1st Korean Information Display Society Conference, pp 141~142, January, 2000.
  361. 조성희, 유재수, 오창우, 이종덕, 홍근조, 권상직, "Charactereristic of Low-Voltage Phosphor Screen in Field Emission Display Application" , 추계 한국화학공학회 재료분과위원회 제 1 회 미립자 제조 및 응용, 1999.
  362. 유재수, 조성희, 홍근영, 이종덕, "저전압 FED 구동을 위한 구형형광체의 광학적 특성", Field Emission Workshop'99, 관동대학교, pp. 9~16, July 28~30, 1999.
  363. 조성희, 권승호,유재수,이종덕,강윤찬,정윤섭,박승빈,"초음파 분무 열분해를 이용한 구형의 ZnGa2O4:Mn 형광체의 직접제조 및 그 발광특성" 춘계 한국화학공학회, pp.1789~1792, April 1999.
  364. Seung Ho Kwon, Gun Young Hong, J. S. Yoo, and J. D. Lee, "Analysis of Phosphor screen Prepared by Electrophoretic Deposition for Full-Color Emission Display Application", Extended Abstract of 5th Phosphor Conference, Sandiego, pp. 205-208 Nonember, 8~10, 1999.[INTL]
  365. Sung Hee Cho, Seung Ho Kwon, Jae Soo Yoo, Jong Duk Lee, Kyung Sun Ryu, Kun Jo Hong, Chang Woo Oh, "Charging Effect of Y2O3:Eu Phosphor Screen for Field Emission Display Application",Extended Abstract of 5th Phosphor Conference, San Diego, pp. 353-356 November, 8~10, 1999. [INTL]
  366. Byung Chang Shim, Byung Gook Park, and Jong Duk Lee, "Co-Silicide Formation on Silicon FEAs from Co, Co/Ti and Ti/Co Layers," International Electron Devices Meeding 1999, Washington, D.C., U.S.A., pp. 709~712, Dec. 5~8, 1999.[INTL]
  367. Jong Duk Lee, Byung Chang Shim and Byung Gook Park, "A Mo-silicidized a-Si FEA," Proceedings of The Sixth International Display Workshops, Sendai, Japan, pp. 935~938, Dec. 1~3, 1999.[INTL]
  368. Jae Sung Sim, In Ho Nam, Sung In Hong, Jong Duk Lee, and Byung Gook Park, "A Study on Soft- and Hard- Breakdowns in MOS Capacitors Using the Parallel Stressing Method," ICVC Seoul, Korea, p. 194~196, Oct., 26~27, 1999.[INTL]
  369. Jong Duk Lee, Byung Chang Shim, Byung Gook Park, "Molybdenum-Silicide Application on Gated Single Crystal and Amorphous Silicon Field Emitter Arrays," IVMC, pp. 414~415, Darmatadt, Germany, July 6~9, 1999.[INTL]
  370. Sung Hee Cho, Seung Ho Kwon, Jae Soo Yoo, Chang Woo Oh, Jong Duk Lee, Kyung Sun Ryu, Sang Jik Kwon, Yun Chan Kang, Seung Bin Park, "Cathodoluminescent Characteristics of Y2O3:Eu red Phosphor Screen in Field Emission Display," IVMC, pp. 7~8, Darmatadt, Germany, July 6~9, 1999.[INTL]
  371. Seung Ho Kwon, Jae Soo Yoo, and Jong Duk Lee, "The Fabrication of Full-Color Phosphor Screen by Electrophoretic Deposition for Field Emission Display Application," IVMC, pp. 5~6, Darmatadt, Germany, July 6~9, 1999.[INTL]
  372. Jong Duk Lee and Jung Hyun Nam, "The technologies of FED devices", IVMC, pp. 26~30, Darmatadt, Germany, July 6~9, 1999.[INTL]
  373. Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Room Temperature Coulomb Oscillation of a Single Electron Switch with an Electrically Formed Quantum Dot and its Modeling," Int'l Conf. on Solid State Devices and Materials, pp. 234~235, Tokyo, Japan, Sept., 1999.[INTL]
  374. Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Room Temperature Coulomb Oscillation of a Single Electron Switch with an Electrically Formed Quantum Dot," the 57th Device Research Conference, California, U.S.A., p. 134~135, June., 28~30, 1999.[INTL]  [DOWNLOAD]
  375. Dong Hyuk Chae, Tae Sik Yoon, Dae Hwan Kim, Jang Yeon Kwon, Ki Bum Kim, Jong Duk Lee, Byung Gook Park, "Programming Dynamics of a single Electron memory Cell with a High-Density SiGe Nanocrystal Array at Room Temperature," Device Research Conference, pp140-141, June, 1999[INTL]  [DOWNLOAD]
  376. J. D. Lee, C. W. Oh, S. J. Kwon, K. J. Hong, T. H. Cho, N. H. Lee, J. S. Yoo, S. H. Cho, "Aging Effects in a 0.7-in. FED Panel System," SID '99 Digest, pp. 588~591, San Jose, U.S.A., May 16-21, 1999.[INTL]
  377. Dong Hyuk Chae, Tae Sik Yoon, Dae Hwan Kim, Jang Yeon Kwon, Chang Hyun Kwak, Kyoung Ryol Kim, Noe Jung Park, Hyun Sik Yoon, Yong Jae Lee, Seok Jae Jeong, Jong Duk Lee, Ki Bum Kim, and Byung Gook Park, "Nanocrystal Memory Cell Using High-Density Si0.73Ge0.27 Quantum Dot Array." The 6th Korean Conference on Semiconductors, pp. 51-52, Seoul, Korea, Feb. 9-11, 1999.
  378. Chang Woo Oh, Jong Duk Lee, and Sang Jik Kwon, "A Study on Aging of Field Emission Display Using Metal Field Emitter," The 6th Korean Conference on Semiconductors, pp. 225-226, Seoul, Korea, Feb. 9-11, 1999.
  379. Nam Seog Kim, Il Hwan Kim, Byung Gook Park, and Jong Duk Lee, "Fabrication of Silicon Field Emitter Arrays combined with HVTFT at Low Temperature," The 6th Korean Conference on Semiconductors, pp. 227-228, Seoul, Korea, Feb. 9-11, 1999.
  380. Inho Nam, Sung In Hong, Jae Sung Sim, Byung Gook Park and Jong Duk Lee, "Ultra-Thin Gate Oxide Grown on Nitrogen Implanted Silicon," The 6th Korean Conference on Semiconductors, pp. 247-248, Seoul, Korea, Feb. 9-11, 1999.
  381. Suk Kang Sung, Young Jin Choi, Jong Duk Lee, and Byung Gook Park, "Fabrication of Ultra-Thin Line using Sidewall Structure and the Application for nMOSFET," The 6th Korean Conference on Semiconductors, pp. 617-618, Seoul, Korea, Feb. 9-11, 1999.
  382. Jong Duk Lee, Chun Gyoo Lee, Chang Woo Oh, Il Hwan Kim, Jung Hyun Nam, Hyung Soo Uh, Sang Jik Kwon and Jae Soo Yoo, "Implementation of Silicon-Based Field Emission Display Using Scaled-Down Metal Field Emitter," The 18th International Display Research Conference, pp.703-706, Seoul, Korea, Sep. 28 - Oct. 1, 1998.[INTL]
  383. Kyung Sun Ryu, Tae Hee Cho, Kun Jo Hong, Sang Jik Kwon and Jong Duk Lee, "Activation Effect of a Glass Packaged FED with Getter," The 18th International Display Research Conference, pp.689-692, Seoul, Korea, Sep. 28 - Oct. 1, 1998.[INTL]
  384. Jong Duk Lee, Byung Chang Shim, Hyung Soo Uh and Byung-Gook Park, "Characterization of Si Field Emitters Based on Single Crystal, Polycrystalline and Amorphous Silicon Substrate," The 18th International Display Research Conference, pp.141-144, Seoul, Korea, Sep. 28 - Oct. 1, 1998.[INTL]
  385. Seoung Ho Kwon, Sung Hee Cho, Jae Soo Yoo and Jong Duk Lee, "Screening of Spherical R.G.B. Phosphor by Electrophoretic Deposition for Full-color FED Application," Extended Abstracts of The Fourth International Conference on the Science and Technology of Display Phosphors, pp. 435-438, Bend, Oregon, U.S.A., Sep. 14-17, 1998.[INTL]
  386. Byung Soo Jeon, Jae Soo Yoo and Jong Duk Lee, "The Effects of Growth Conditions on The Luminescence of ZnO:Zn Thin Film Phosphor Grown By MOCVD," Extended Abstracts of The Fourth International Conference on the Science and Technology of Display Phosphors, pp. 409-412, Bend, Oregon, U.S.A., Sep. 14-17, 1998.[INTL]
  387. Jong Duk Lee, Jung Hyun Nam and Il Hwan Kim, "Design of MCFED Integrated with Driver Circuits," Field Emission Workshop '98, pp.95-103, Kwandong Univ., Kangwon-do, Korea, August 4-7, 1998.
  388. Jong Duk Lee, Hyung Soo Uh, Byung Chang Shim, Euo Sik Cho, Chang Woo Oh, and Sang Jik Kwon, "Tip Surface Silicidation to improve emission behavior of field emitter arrays," 11th International Vacuum Microelectronics Conference, pp.304-305, Asheville, NC, USA, July 19-24, 1998.[INTL]
  389. Jong Duk Lee, Byung Chang Shim, Chang Woo Oh, Il Hwan Kim, and Hyung Soo Uh "Surface Morphology and I-V characteristics of Single Crystal, Polycrystalline and Amorphous Silicon FEAs," 11th International Vacuum Microelectronics Conference, pp.117-118, Asheville, NC, USA, July 19-24, 1998.[INTL]
  390. Jong Duk Lee, Jung Hyun Nam, Il Hwan Kim, and Chang Woo Oh, "Design of nMOS Driving Circuits Integrated with Field Emitter Arrays," 11th International Vacuum Microelectronics Conference, pp.63-64, Asheville, NC, USA, July 19-24, 1998.[INTL]
  391. Sang Jik Kwon, Kyung Sun Ryu, Tae Hee Cho, and Jong Duk Lee, "Gettering Effect inside the Glass Packaged FED Panel," 11th International Vacuum Microelectronics Conference, pp.55-56, Asheville, NC, USA, July 19-24, 1998.[INTL]
  392. Jong Duk Lee, Il Hwan Kim, and Chang Woo Oh, "Implementation of FED with MOSFET-Controlled FEA," 11th International Vacuum Microelectronics Conference, pp.44-45, Asheville, NC, USA, July 19-24, 1998.[INTL]
  393. Dae Hwan Kim, Jong Duk Lee, Byung Gook Park, and Hyung Gyoo Lee, "Silicon Single Electron Switch with an Electrically Formed Qunatum Dot," 56th Annual Device Research Conference, Charlottesville, Virginia, June 22-24, 1998.[INTL]
  394. S. J. Kwon, K. S. Ryu, T. H. Cho, H. S. Uh, and J. D. Lee, "Performance Evaluation of a Glass-Packaged FED Panel," SID Int'l Symp. Digest of Technical Papers, Vol. 29, pp.873-876, Anaheim, CA, U.S.A., May 17-22, 1998.[INTL]
  395. Sang Jik Kwon, Kyung Sun Ryu, Tae Hee Cho, Chun Gyoo Lee, Hyung Soo Uh and Jong Duk Lee, "Glass Packaging of the Field Emission Array and Vacuum Evaluation within the FED Panel," Proceedings of the 14th Korean Vacuum Society Conference, pp32-33, Korea, Feb., 1998.
  396. Byung Chang Shim, Hyung Soo Uh, and Jong Duk Lee, "Surface morphology and I-V characteristics of single crystal, polycrystalline and amorphous silicon FEAs," The 5th Korean Conference on Semiconductors, pp.529-530, Seoul, Korea, Jan. 25-27, 1998.
  397. Sung-in Hong, Jong Duk Lee and Byung-Gook Park, "Electrical Characterization of the wet-grown ultra-thin gate oxide and its application to CMOSFETs," The 5th Korean Conference on Semiconductors, pp.467-468, Seoul, Korea, Jan. 25-27, 1998.
  398. Yeong-Taek Lee, Jong Duk Lee, and Byung-Gook Park, "Indium doped Buried Channel pMOSFETs with n+ Polysilicon Gate," The 5th Korean Conference on Semiconductors, pp.403-404, Seoul, Korea, Jan. 25-27, 1998.
  399. Jeong-Young Park, Jared D. Lera, Y. J. Lee, K. J. Chun, Jong Duk Lee, M. Yakshin, S. S. Choi, and Young Kuk, "Fabrication and Characterization of Microcolumn Array Aligned by Field Emission Array," The 5th Korean Conference on Semiconductors, pp.311-312, Seoul, Korea, Jan. 25-27, 1998.
  400. Sang Jik Kwon, Kyung Sun Ryu, Tae Hee Cho, Chun Gyoo Lee, Hyung Soo Uh and Jong Duk Lee, "Vacuum Evaluation of the Glass Packaged FED Panel," The 5th Korean Conference on Semiconductors, pp.209-210, Seoul, Korea, Jan. 25-27, 1998.
  401. Hyung Soo Uh, Sang Jik Kwon, Byung Gook Park and Jong Duk Lee, "Emission Characteristics of Gated Mo-Polycide Field emitter Arrays," The 5th Korean Conference on Semiconductors, pp.203-204, Seoul, Korea, Jan. 25-27, 1998.
  402. Dae Hwan Kim, Jong Duk Lee, Byung-Gook Park, and Hyung Gyu Lee, "Single Electron Transistors with a Dual Gate Structure," The 5th Korean Conference on Semiconductors, pp.47-50, Seoul, Korea, Jan. 25-27, 1998.
  403. Sang Jik Kwon, Kyung Sun Ryu, Jun Weon Song, Chun Gyu Lee, Hyung Soo Uh, and Jong Duk Lee, "Performance Evaluation of FED Packaging by the In-line Emission Characterization during Packaging," Display Works '98, pp.31-32, San Jose, California, Jan. 20-22, 1998.[INTL]
  404. Hyung Soo Uh, Byung Gook Park and Jong Duk Lee, "Enhanced Electron Emission and Its Stability from Gated Mo-Polycide Field Emitters," IEDM 1997 Technical Digest, pp.713-716, Washington D.C., Dec. 7-10, 1997.[INTL]
  405. Yun Chan Kang, Jeong Su Choi, Seung Bin Park, Sung Hee Cho, Jae Soo Yoo and Jong Duk Lee, "Preparation of Spherical YAG:Tb Phosphor by Spray Pyrolysis Using Filter Expansion Aerosol Generator," The Third International Conference on the Science and Technology of Display Phosphors, pp.257-260, Huntington Beach, U. S. A., Nov. 3-5, 1997.[INTL]
  406. Sung Hee Cho, Jae Soo Yoo, Jong Duk Lee, Jeong Su Choi, and Seung Bin Park, "Preparation of Spherical ZnGa2O4:Mn Phosphors by Aerosol Pyrolysis," The Third International Conference on the Science and Technology of Display Phosphors, pp.307-310, Huntington Beach, U. S. A., Nov. 3-5, 1997.[INTL]
  407. Byung Soo Jeon, Jae Soo Yoo, and Jong Duk Lee, "ZnO:Zn Thin Film grown by Metalorganic Chemical Vapor Deposition," The Third International Conference on the Science and Technology of Display Phosphors, pp.233-236, Huntington Beach, U. S. A., Nov. 3-5, 1997.[INTL]
  408. Jong Duk Lee, Donghwan Kim and Il Hwan Kim, "MOSFETs Get in FED Panels," Invited Paper, The Fourth International Display Workshops, pp.715-718, Nagoya, Japan, Nov. 19-21, 1997.[INTL]
  409. Sung Hee Cho, Jae Soo Yoo, and Jong Duk Lee, "A New Synthetic Method to prepare Spherical Phosphors for Emissive Screen Applications," International Display Research Conference, pp.334-337, Toronto, Canada, Sep. 15-19, 1997.[INTL]
  410. Hyung Soo Uh, Sung Ho Jo, Jung Hyun Nam, Hyung Soon Nam, Sang Jik Kwon, Jae Soo Yoo, Byung Gook Park, and Jong Duk Lee, "A Cathodoluminescent Flat Panel Display Based on Polycrystalline Silicon Field Emitters," International Display Research Conference, pp.322-325, Toronto, Canada, Sep. 15-19, 1997.[INTL]
  411. Ho Young Song, Deog Kyoon Jeong, Jong Duk Lee, "Current Mode Column Driver for FED," 10th International Vacuum Microelectronics Conference, pp.701-705, Kyongju, Korea, August 17-21, 1997.[INTL]
  412. Sang Won Kang, Byung Soo Jeon, Jae Soo Yoo and Jong Duk Lee, "Photolithographic Patterning of Phosphors Screen by Electrophoretic Deposition for Field Emission Display," 10th International Vacuum Microelectronics Conference, pp.682-686, Kyongju, Korea, August 17-21, 1997.[INTL]
  413. Shin Sung Kim, Sung Hee Cho, Jae Soo Yoo, Sung Ho Jo, and Jong Duk Lee, "The Effect of the Resistivity of ZnGa2O4:Mn Phosphor Screen on the Emission Characteristics of Field Emitter Array," 10th International Vacuum Microelectronics Conference, pp.676-681, Kyongju, Korea, August 17-21, 1997.[INTL]
  414. Hyun-Jun Ha, Jeong-Gu Jin, Gun-Sik Park, and Jong Duk Lee, "Focusing of Electron Beam in Double-Gated Field Emitter Arrays," 10th International Vacuum Microelectronics Conference, pp.636-639, Kyongju, Korea, August 17-21, 1997.[INTL]
  415. Jeong-Young Park, Jared D. Lera, M. A. Yakshin, S. S. Choi, Y. Lee, J. D. Lee, K. J. Chun, D. Jeon and Young Kuk, "Fabrication of multiple microcolumn array combined with field emission array(FEA)," 10th International Vacuum Microelectronics Conference, pp.587-592, Kyongju, Korea, August 17-21, 1997.[INTL]
  416. Sang Jik Kwon, Dean M. Aslam, Yanbo Li, Young Hwa Shin, and Jong Duk Lee, "Low Voltage Emission Characteristics of the Undoped Polycrystalline Diamond Field Emitter by MPCVD," 10th International Vacuum Microelectronics Conference, pp.475-479, Kyongju, Korea, August 17-21, 1997.[INTL]
  417. Chang Woo Oh, Chun Gyoo Lee, Jong Ho Lee, Byung Gook Park, and Jong Duk Lee, "Novel Metal Field Emitter Structure for Low Voltage Operation," 10th International Vacuum Microelectronics Conference, pp.426-430, Kyongju, Korea, August 17-21, 1997.[INTL]
  418. Hyung Soo Uh, Byung Gook Park and Jong Duk Lee, "Formation of Mo Silicide on Poly-Si Field Emitters for Improved Emission Stability," 10th International Vacuum Microelectronics Conference, pp.371-375, Kyongju, Korea, August 17-21, 1997.[INTL]
  419. Jaehoon Jung, Yeong-Hoon Kim, Byoungho Lee, and Jong Duk Lee, "Optimal Design of FEA (Field Emitter Array) using an Evolution Strategy," 10th International Vacuum Microelectronics Conference, pp.341-345, Kyongju, Korea, August 17-21, 1997.[INTL]
  420. Jung Hyun Nam, Jeong Don Ihm, Hyung Soo Uh, Yeo Hwan Kim, Kyu Man Choi, and Jong Duk Lee, "Characteristics and Circuit Model of a Field Emission Triode," 10th International Vacuum Microelectronics Conference, pp.321-325, Kyongju, Korea, August 17-21, 1997.[INTL]
  421. Chun Gyoo Lee, Byung Gook Park, and Jong Duk Lee, "Calculation of Emission Current Density in Cone-Type Field Emitter with Non-Triangular Potential Barrier," 10th International Vacuum Microelectronics Conference, pp.315-320, Kyongju, Korea, August 17-21, 1997.[INTL]
  422. Hyung Soo Uh, Sung Ho Jo, Jung Hyun Nam, Yee Sik Cho, Hyung Soon Nam, Sang Jik Kwon, Jae Soo Yoo, and Jong Duk Lee, "Electron Emission and Luminescent Characteristics of Vacuum-seald Poly-Si Field Emitter Arrays," 10th International Vacuum Microelectronics Conference, pp.251-255, Kyongju, Korea, August 17-21, 1997.[INTL]
  423. Young Jin Choi, Byung-Gook Park and Jong Duk Lee, "A 0.1 um IHLATI(Indium Halo by Large Angle Tilt Implant) nMOSFET for 1.0 V Low Power Application," 55th Annual Device Research Conference Digest, pp16-17, Colorado State Univ., U.S.A., Jun. 23-25, 1997.[INTL]
  424. Kyung Sun Ryu, Sang Jik Kwon, Hyung Soo Uh and Jong Duk Lee, "UHV Glass Packaging of the Si Field Emitter Array for Display," Proceedings of the 13th Korea Vacuum Society Conference, pp89-90, Goonsan Univ., Jeonbook, Korea, Jul. 3-4, 1997.
  425. Sang Jik Kwon, Kyung Sun Ryu, Hyung Soon Nam, Hyung Soo Uh and Jong Duk Lee, "Fabrication of the Si FED Panel with 0.7 Inch Diagonal and Its Driving," The 1st Korean Symposium on Information Display, p57, KIST, Korea, Jun. 26-27, 1997.
  426. Jong Duk Lee, "The Prospects of FPD Market and Technology," Invited Talk, HanGlass (Hankook Glass Co. LTD.), Feb. 28, 1997.
  427. Jong Duk Lee, "The Prospects of FPD Market and Technology," Invited Talk, Korean Vacuum Society 12th Annual Conference, Feb. 27-28, 1997.
  428. Ho Young Song, Duk Kyun Jung, and Jong Duk Lee, "Current Mode Column Driver for FED," The 4th Korean Conference on Semiconductors, p567, Kyung Ju, Korea, Feb. 19-21, 1997
  429. Hyouk Man Kwon, Yeong Taek Lee, Byung Gook, and Jong Duk Lee, "Dual-poly Gate Surface Channel 0.1 CMOSFETs," The 4th Korean Conference on Semiconductors, p519, Kyung Ju, Korea, Feb. 19-21, 1997
  430. Tae Jong Yoo, Young Taek Lee, Dong Soo Woo, Jong Duk Lee, and Byung Gook Park, "Fabrication of 0.1 Buried Channel and Surface Channel pMOSFETs," The 4th Korean Conference on Semiconductors, p517, Kyung Ju, Korea, Feb. 19-21, 1997
  431. Dae Nam Ha, Dong Uk Kim, Jong Keun Yoo, Jong Tae Park, Byung-Gook Park, and Jong Duk Lee, "A Study on determination method of lifetime and supply voltage of thin SiO2," The 4th Korean Conference on Semiconductors, p491, Kyung Ju, Korea, Feb. 19-21, 1997
  432. Hyung Soo Uh, Hyung Soon Nam, Sang Jik Kwon, and Jong Duk Lee, "Poly-crystalline Silicon Field Emitter Arrays Applied to Vacuum Fluorescent Display," The 4th Korean Conference on Semiconductors, p269, Kyung Ju, Korea, Feb. 19-21, 1997
  433. Jong-Ho Lee, Hyung Soo Uh, Cheon-Gyu Lee, Hyung-Cheol Shin, and Jong-Duk Lee, "Electrical and Opical Isolation for Si FED : Characterization and Improvement," The 4th Korean Conference on Semiconductors, p267, Kyung Ju, Korea, Feb. 19-21, 1997
  434. Dong Hwan Kim and Jong Duk Lee, "A Metal-Oxide-Semiconductor Field-Effect Transistor-Controlled Field Emitter Array," The 4th Korean Conference on Semiconductors, p263, Kyung Ju, Korea, Feb. 19-21, 1997
  435. Il Hwan Kim, Chun Gyoo Lee, and Jong Duk Lee, "Fabrication of Metal FEAs on Double Polycrystalline Silicon Layers," The 4th Korean Conference on Semiconductors, p261, Kyung Ju, Korea, Feb. 19-21, 1997
  436. Suk Shin Yoon, Sang Jik Kwon, Young Hwa Shin, and Jong Duk Lee, "A Study on Field Emitter Array Using Polysilicon," The 4th Korean Conference on Semiconductors, p259, Kyung Ju, Korea, Feb. 19-21, 1997
  437. Jong Duk Lee, "The Prospects of FPD Market and Technology," SEMI ISS(Industry Strategy Symposium) KOREA, Session III, Oct. 16-17, 1996.
  438. Hyouk Man Kwon, Byoung Gook Park, and Jong Duk Lee, "Fabrication of Surface Channel 0.1 CMOSFETs," Proceedings of KITE Fall Conference '96, Vol. 19, No. 2, pp1304-1307, Seoul, Korea, Nov. 23, 1996.
  439. Sung Hee Cho, Jae Soo Yoo, and Jong Duk Lee, "Enhancement of the Low-Voltage Efficiency in Zinc-Gallate Phosphors by Oxygen Vacancy," Extended Abstracts of The Second International Conference on the Science and Technology of Display Phosphors, pp. 211-214, San Diego, USA, Nov. 18-20, 1996.[INTL]
  440. Byung Soo Jeon, Sang Won Kang, Jae Soo Yoo, and Jong Duk Lee, "Electrophoretic Deposition for FED Phosphor Screens," Proceedings of '96 KIChE Fall Meeting, Vol. 2, No. 2, pp. 2667-2670, Taegu, Korea, Oct. 18-19, 1996.
  441. Sang Won Kang, Jae Soo Yoo, and Jong Duk Lee, "The Preparation of Low-Voltage Phosphor Screen by Electrophoretic Deposition," Proceedings of '96 KIChE Fall Meeting, Vol. 2, No. 2, pp. 2587-2590, Taegu, Korea, Oct. 18-19, 1996.
  442. Seong Min Park, Jae Soo Yoo, and Jong Duk Lee, "Synthesis of YAG as Host Material for Low-Voltage Phosphor," Proceedings of '96 KIChE Fall Meeting, Vol. 2, No. 2, pp. 2567-2569, Taegu, Korea, Oct. 18-19, 1996.
  443. Sung Hee Cho, Jae Soo Yoo, and Jong Duk Lee, "Enhancement of CL Characteristics in ZnGa2O4:Mn Phosphor Film by Addition of Metal Oxides," Proceedings of '96 KIChE Fall Meeting, Vol. 2, No. 2, pp. 2543-2546, Taegu, Korea, Oct. 18-19, 1996.
  444. Byung Soo Jeon, Jae Soo Yoo, and Jong Duk Lee, "Preparation of the ZnO:Zn Thin Film Phosphor by MOCVD," Proceedings of '96 KIChE Fall Meeting, Vol. 2, No. 2, pp. 2527-2530, Taegu, Korea, Oct. 18-19, 1996.
  445. Yeong-Taek Lee, Ki-Whan Song, Byung-Gook Park, and Jong Duk Lee, "Channel Doping Engineering with Indium as an Alternative p-Type Dopant," Proc. of 1996 Int'l Conf. on Solid State Devices and Materials, Yokohama, Japan, pp. 127-129, Aug. 26-29, 1996.[INTL]
  446. Yeon-Cheol Heo, Byung Gook Park, and Jong Duk Lee, "Application of Ultra-Thin Rapid Thermal Oxide to 0.15 NMOSFET," Proceedings of International Workshop on Advanced LSI's, pp.51-56, Korea, July 18-20, 1996.[INTL]
  447. Jae Soo Yoo, Byung-Soo Jeon, Sang Won Kang, and Jong Duk Lee, "Optical Characteristics of Phosphor Screen in Field Emission Environments," 9th International Vacuum Microelectronics Conference, pp.562-565, St. Petersburg, Russia, July 7-12, 1996.[INTL]
  448. Donghwan Kim, Sang Jik Kwon, and Jong Duk Lee, "New Cathode Structure of Si-Based Field Emitter Arrays," 9th International Vacuum Microelectronics Conference, pp.534-537, St. Petersburg, Russia, July 7-12, 1996.[INTL]
  449. Il Hwan Kim, Chun Gyoo Lee, Byung Gook Park, Jong Duk Lee, and Joha Hyun Won, "Metal FEAs on Double Layer Structure of Polycrystalline Silicon," 9th International Vacuum Microelectronics Conference, pp.423-426, St. Petersburg, Russia, July 7-12, 1996.[INTL]
  450. Hyung Soo Uh, Sang Jik Kwon, Jong Duk Lee, and Hen Suh Park, "Fabrication and Characterization of Gated n+ Polycrystalline Silicon Field Emitter Arrays," 9th International Vacuum Microelectronics Conference, pp.419-422, St. Petersburg, Russia, July 7-12, 1996.[INTL]
  451. Chun Gyoo Lee, Byung Gook Park, and Jong Duk Lee, "A New Fabrication Process of Volcano-Shaped Field Emitters for Large-Area Display Applications," 9th International Vacuum Microelectronics Conference, pp.384-387, St. Petersburg, Russia, July 7-12, 1996.[INTL]
  452. Yeon-Cheol Heo, Byung Gook Park, and Jong Duk Lee, "The Effect of Guard Line on Plasma Damage," Proceedings of 1st International Symposium on Plasma Process-Induced Damage, pp.94-97, May 13-14, Santa Clara, CA, 1996.[INTL]
  453. Jeongho Lyu, Byung-Gook Park, Kukjin Chun and Jong Duk Lee, A High Performance 0.1 um Inverted-Sidewall Recessed-Channel (ISRC) nMOSFET, p483, Jeongeup, Korea, Feb. 12-14, 1996.
  454. Yeong-Taek Lee, Tae Jong Yoo, Byung-Gook Park and Jong Duk Lee, Fabrication of 0.1 um surface channel pMOSFET, p481, Jeongeup, Korea, Feb. 12-14, 1996.
  455. Young Jin Choi, Byung-Gook Park and Jong Duk Lee, Performance enhancement of 0.1 um nMOSFETs by adjusting channel doping and gate oxide thickness, The 3rd Korean Conference on Semiconductors, p479, Jeongeup, Korea, Feb. 12-14, 1996.
  456. Kyung Nam Park, Young Jin Choi, Byung-Gook Park and Jong Duk Lee, The Dependence of Hot-Carrier Reliability of Ultra-Thin Gate Oxide on TCA Incorporation, The 3rd Korean Conference on Semiconductors, p451, Jeongeup, Korea, Feb. 12-14, 1996.
  457. Jeongho Lyu, Byung-Gook Park, Kukjin Chun, and Jong Duk Lee, "A 0.1um Inverted-Sidewall Recessed-Channel(ISRC) nMOSFET for High Performance and Reliability," IEDM Technical Digest, pp.17.5.1-17.5.4, Washington D.C. Dec. 10-13, 1995.[INTL]
  458. Chun Gyoo Lee, Ho Young Ahn, and Jong Duk Lee, "Scaling-down of Cone-like Field Emitter Using LOCOS," IEDM Technical Digest, pp.16.4.1-16.4.4, Washington D.C. Dec. 10-13, 1995.[INTL]
  459. Jeon Don Im, Yeo Hwan Kim, Jong Duk Lee, "Characteristics and Circuit Model of Field Emission Device," Proceedings of KITE Fall Conference '95, Vol. 18, No. 2, pp663-666, Seoul, Korea, Dec. 9, 1995
  460. Kyung Nam Park, Byung Gook Park, Jong Duk Lee, "Ultra-Thin Gate Oxide Grown at Low Temperature ; the Dependence of Its Electrical Characteristics on the Amounts of TCA Incorporation," Proceedings of KITE Fall Conference '95, Vol. 18, No. 2, pp615-618, Seoul, Korea, Dec. 9, 1995
  461. Ki Whan Song, Tae Jong Yoo, Byung Gook Park, Jong Duk Lee, "A Study on 0.1um nMOSFETs with Indium Implanted Channel," Proceedings of KITE Fall Conference '95, Vol. 18, No. 2, pp519-522, Seoul, Korea, Dec. 9, 1995
  462. Young Jin Choi, Byung Gook Park, Jong Duk Lee, "Fabrication of 0.1um nMOSFET's using Retrograde Boron Channel LDD Structure," Proceedings of KITE Fall Conference '95, Vol. 18, No. 2, pp515-518, Seoul, Korea, Dec. 9, 1995
  463. Sung J. Jang, Yong T. Kim, Chong K. Yu, Jong T. Park, Byung G. Park, Jong D. Lee, "Scaling Methodology of Deep Submicron P-MOSFET," Proceedings of KITE Fall Conference '95, Vol. 18, No. 2, pp507-510, Seoul, Korea, Dec. 9, 1995
  464. Il Hwan Kim, Chun Gyoo Lee, and Jong Duk Lee, "Metal FEAs Fabricated with Local Oxidation of Polysilicon for Large-Area Display Applications," Technical Digest 1995 Asian Symposium on Information Displays, Seoul, Korea, Oct. 24, 1995[INTL]
  465. Jong Duk Lee, Hyung Soo Uh, Chun Gyoo Lee, and Sang Jik Kwon, "Fabrication of Si-tip and Mo-tip Field Emitter Arrays by Local Oxidation," Invited Talk, 10th Meeting of Vacuum Microelectronics 158 Commitee, JSPS, Hamamatsu, Japan, Oct. 19, 1995[INTL]
  466. S. H. Cho, J. S. Yoo, and J. D. Lee, "Synthesis and Characterization of Red-Emitting Perovskite CaTiO3: Pr Luminescent Powders of FED Application," Proceedings of the 15th International Display Research Conference, Hamamatsu, Japan, pp.863-865, Oct., 16-18, 1995.[INTL]
  467. J. S. Yoo and J. D. Lee, "The Effects of Particle Size and Surface Recombination Rate on the Brightness of Low-Voltage Phosphor," Proceedings of the 15th International Display Research Conference, Hamamatsu, Japan, pp.647-650, Oct., 16-18, 1995.[INTL]
  468. Sang Jik Kwon, Byung Gook Park, and Jong Duk Lee, "Ultra Shallow p+n Junction Formation Using the Solid Phase Diffusion(SPD) through 'a-Si/Thin Barrier Oxide' Layer," Proc. of 1995 Int'l Conf. on Solid State Devices and Materials, Osaka, Japan, pp.354-356, August, 1995.[INTL]
  469. Donghwan Kim, Sang Jik Kwon, Jong Duk Lee, and Joha H. Won, "Fabrication of silicon field emitter by forming porous silicon," 8th International Vacuum Microelectronics Conference, pp.176-180, Portland, U.S.A., July 30-August 3, 1995.[INTL]
  470. Chun Gyoo Lee, Ho Young Ahn, Jong Duk Lee, and Hen Suh Park, "A new approach to manufacturing field emitter arrays with submicron gate apertures," 8th International Vacuum Microelectronics Conference, pp.14-17, Portland, U.S.A., July 30-August 3, 1995.[INTL]
  471. W. H. Lee, B. G. Park and J. D. Lee, "Design Methodology of 0.1 MOS Device," Invited Talk, Proc. of the 13th Australian Microelectronics Conference, pp.115-121, IREE, Adelaide, Australia, July 16-19, 1995.
  472. Youngjoo Yee, Kukjin Chun, and Jong Duk Lee, "Polysilicon Surface Modification Technology To Reduce Sticking of Microstructures," Proceedings of the 8th International Conf. on Solid-State Sensors and Actuators, and Eurosensors IX, Stockholm, Sweden, pp.206-209, June 25-29, 1995.[INTL]
  473. Hyung Soo Uh, Chun Gyoo Lee, Sang Jik Kwon and Jong Duk Lee, "Silicon and Metal Tip Arrays Fabricated by LOCOS," Invited Talk, Proceedings of KITE Summer Conf. '95, Vol. 18, No. 1, pp.13-18, June, 1995.
  474. J. H. Lee, W. K. Kang, S. W. Kang, Y. H. Kim, J. S. Yoo, Y. J. Park and J. D. Lee, "Modeling of Critical Current Density in Bipolar Transistor with Retrograde Collector Profile," 2nd Korean Semiconductor Conference, pp.261-262, Daejun, Feb., 1995.
  475. Dongwhan Kim and Jong Duk Lee, "Fabrication of Silicon Field Emission Devices using Porous Silicon," 2nd Korean Semiconductor Conference, pp.191-192, Daejun, Feb., 1995.
  476. Ho Ryun Chung, Sang Jik Kwon and Jong Duk Lee, "Si Tip Field Emission Device with H2O Densified Oxide(HDO)," 2nd Korean Semiconductor Conference, pp.187-188, Daejun, Feb., 1995.
  477. Hyung Soo Uh and Jong Duk Lee, "Development of Silicon Field Emitter Arrays for Cathodoluminescent Flat Panel Displays," 2nd Korean Semiconductor Conference, pp.185-186, Daejun, Feb., 1995.
  478. Jong Duk Lee, "Should we do FED Research?," Invited Talk in 2nd Korean Semiconductor Conference, p.183, Daejun, Feb., 1995.
  479. Sung Ho Jo, Sang Jik Kwon, and Jong Duk Lee, "A New Cathode for Vacuum Microelectronic Devices: Silicon Tip Avalanche Cathode," IEDM 1994 Technical Digest, San Francisco, pp. 2.3.1-2.3.4, Dec., 1994.[INTL]
  480. Taewon Suh, Youngmog Ham, Kukjin Chun, Jong Duk Lee, and Kuangsup Cho, "3-D Resist Profile Simulation Using Monte-Carlo & Develop Simulation on E-Beam Lithography," Proc. of KITE Fall Conference, Vol.17, No.2, pp.914-917, Nov., 1994.
  481. Jong Duk Lee, "New Flat Panel Display Technology Using Field Emission," Bulletin of the Korean Physical Society, Vol.12, No.2, p.379, Oct., 1994.
  482. Woo-Hyeong Lee and Jong Duk Lee, "New Device Design Approach for Submicron CMOS, "TARSMIT 94(3rd ASEAN REGIONAL SEMINAR ON MICROELECTRONICS AND INFORMATION TECHNOLOGY), pp.95-104, Bangkok, Thailand, Aug. 9-11, 1994.[INTL]
  483. J. H. Lee, C. B. Park, Y. J. Park and Jong Duk Lee, "High Performance Bipolar Transistor with Self-Aligned Recessed Emitter and Selectively Retrograded Collector Profile," Proc. of KITE Summer Conf. '94, Vol. 17, No. 1, pp.473-475, Jeonju, July, 1994.
  484. Hyung Soo Uh, Nam Shin Park, and Jong Duk Lee, "New fabrication method of silicon field emitter array using pure thermal oxide," 7th International Vacuum Microelectronics Conference, pp.387-390, Grenoble, France, July, 1994.[INTL]
  485. Ho Young Ahn, Chun Gyoo Lee, and Jong Duk Lee, "Numerical analysis on field emission for the effect of space charge and insulating layers," 7th International Vacuum Microelectronics Conference, pp.151-154, Grenoble, France, July, 1994.[INTL]
  486. Sung Ho Jo, Sang Jik Kwon, Jong Duk Lee, and Hen Suh Park, "Fabrication and analysis of silicon tip avalanche cathode," 7th International Vacuum Microelectronics Conference, pp.120-123, Grenoble, France, July, 1994.[INTL]
  487. Jong Ho Lee, Jong Duk Lee, U-Sung Choi, and Choon Bae Park, "Properties of Polysilicon/Silicon(n+)-Silicon(p) Junction with Process Condition," Proceedings of the spring symposium of KIEEME(1994), pp.152-155, May, 1994.
  488. Hyung Soo Uh, Nam Shin Park, and Jong Duk Lee, "Fabrication of Si Field emitter Array using thermal oxide," 1st Korean Semiconductor Conference, pp.411-412, Feb., 1994.
  489. Jong Duk Lee, "New Display Technology - FED," 1st Korean Semiconductor Conference, pp.407-410, Feb., 1994.
  490. Sang Jik Kwon, Yeo Hwan Kim, and Jong Duk Lee, "Electrical and Boron Diffusion Characteristics in the As Preamorphized p+ Polysilicon Gate," 1st Korean Semiconductor Conference, pp.23-24, Feb., 1994.
  491. Woo-Hyeong Lee, Yeon Cheol Heo, Young-June Park, and Jong Duk Lee, "A New MOSFET Design Concept Using Recessed Channel Structure for Deep Submicron Application," 1st Korean Semiconductor Conference, pp.5-6, Feb., 1994.
  492. Woo-Hyeong Lee, Young-June Park, and Jong Duk Lee, "Gate Recessed(GR) MOSFET with Selectively Halo-Doped Channel and Deep Graded Source/Drain for Deep Submicron CMOS," IEDM Technical Digest, pp.135-138, Washington D.C. Dec., 1993.[INTL]
  493. Yeo Hwan Kim, Kuk Jin Chun, Sang Jik Kwon and Jong Duk Lee, "Ti-silicided Ultra shallow p+-n Junction Formation by AS-Preamorphization through Pre-Deposited Amorphous Si layer," 1993 Int'l Conf. on Solid State Devices and Materials, Makuhari, Japan, pp.1023-1025, Aug., 1993.[INTL]
  494. Sanggi Yu, KukJin Chun and Jong Duk Lee, "The Novel Structure with Polysilicon Grain Hole for Advanced DRAM," 1993 Int'l Conf. on Solid State Devices and Materials, Makuhari, Japan, pp.880-882, Aug., 1993.[INTL]
  495. Woo-Hyeong Lee, Young-June Park and Jong Duk Lee, "A New Recessed Channel MOSFET with Selectively Halo-Doped Channel and Deep Graded Source/Drain," 1993 Int'l Conf. on Solid State Devices and Materials, Makuhari, Japan, pp.452-454, Aug., 1993.[INTL]
  496. Woo-Hyeong Lee, Young-June Park and Jong Duk Lee, "A New Recessed Gate MOSFET Structure with the Graded Source/Drain," 51st Device Research Conference at Santa Barbara, USA, July, 1993.[INTL]
  497. Y.-H. Kim, S.-J. Kwon, K. Chun and J. D. Lee, "The Properties of p+-polysilicon Pre-amorphized with As+," Proc. of International Workshop on Process and Device of Scaled LSI's, pp,138-143, Seoul, Korea, June, 1993.
  498. Sanggi Yu, Kukjin Chun and Jong Duk Lee, "The Honeycomb Shape Capacitor Structure for ULSI DRAM," Proc. of International Workshop on Process and Device of Scaled LSI's, pp.42-45, Seoul, Korea, June, 1993.[INTL]
  499. Hoyoung Ahn, Chungyu Lee, K. S. Choi and Jong Duk Lee, "Theoretical Analysis of Electrical Field and Field Emission Current for Spindt-Type Emitter," Proc. of KIEE Joint Meeting of Computer, Semiconductor, Material and Device, CAD and VLSI design, pp.100-103, May, 1993.
  500. Hyung Soo Uh and Jong Duk Lee, "Fabrication and Characterization of Silicon Field Arrays(Si-FEAs)," Proc. of 66th Conference of Korean Physical Society, April 1993.
  501. Y. H. Kim, S. J. Kwon, K. J. Chun and J. D. Lee, "Fabrication of Sub-half Micron PMOS Device," Proc. 1992 IEEE Int'l Conf. Semicon. Elect., Malaysia, pp.245-253, Oct. 1992.[INTL]
  502. Yeo-Hwan Kim, Sang-Jik Kwon, Kuk-Jin Chun and Jong Duk Lee, "Fabrication of Sub-half Micron PMOS Device," Proc. of KITE Conf. on Electronic Computing, Semiconductor and Device, CAD and VLSI Design, vol.10, no.1, pp.185-188, June 1992.
  503. S. B. Lee, S. G. Yu, Y. H. Kim, K. J. Chun and J. D. Lee, "A Study of the Electron-Beam Direct Writing Technique for MIX-AND-MATCH with Stepper," KITE, vol.29-A, no.5, pp.61-64, May 1992.
  504. S. H. Jo, Y. Heo and J. D. Lee, "A New SO Measuring Technique for the BC MOS Structure with Shallow and Moderately Doped Channel Layer," Proc. of KITE Fall Conf., Vol.14, No.2, pp.329-332, Nov. 1991.
  505. S. B. Lee, Y. H. Kim, H. K. Oh, Y. C. Chung, K. J. Chun and J. D. Lee, "Electron Beam Direct Writing for MIX-AND-MATCH with Stepper," Technical Digest of International Conf. on VLSI and CAD, KITE & IEEE, pp.235-238, Oct. 1991.[INTL]
  506. Yeon-Cheol and Jong Duk Lee, "An IT-CCD Image Sensor with 574(H)x489(V) Pixels," Proc. of International Conf. on Microelectronics Sensor and Transducer Systems and their Application, Bandung-Indonesia, 21p, Jan. 1991.[INTL]
  507. Yeon-Cheol Heo and Jong Duk Lee, "A CCD Image Sensor with 574(H)x489(V) Pixels," Sensor Technology Res. Center(KNU) Proc. of 1990 Meeting on Sensor Technology, pp.92-99, Nov. 1990.
  508. J. H. Lee, Y. Park and J. D. Lee, "A BiCMOS Device with Buried Twin Well and Polysilicon Emitter," Proc. of KITE Fall Conf., Vol.13, No.2, pp.399-402, Nov. 1990.
  509. C. M. Chung and J. D. Lee, "High Sensitivity Signal Charge Detector for a CCD Image Sensor," Proc. of KITE Fall Conf., Vol.13, No.2, pp.379-402, Nov. 1990.
  510. Sang-Jik Kwon and Jong Duk Lee, "Formation of Shallow p+-n Junction by B+ Implantation through As+-Preamorphized Si," Proc. of KITE Fall Conf., Vol.13, No.2, pp.379-382, Nov. 1990.
  511. Sang-Jik Kwon, Hyeong-Joon Kim and Jong Duk Lee, "Shallow p+-n Junction Formation by As+-Preamorphization and Field-Retarded Diffusion," Japanese Soc. of Applied Physics Conf. and Solid State Devices and Materials, pp.413-416, Aug. 1990.[INTL]
  512. Jong Ho Lee, Young June Park and Jong Duk Lee, "Under Field Oxide Dopant Enhancement (UFDE) for CMOS and BiCMOS Technology," Japanese Soc. of Applied Physics Conf. on Solid State Devices and Materials, pp.649-652, Aug. 1990.[INTL]
  513. Jong Ho Lee, Young June Park and Jong Duk Lee, "Effect of High Injection Barrier on the BiCMOS Inverter Delay," 89 International Conference on VLSI and CAD, KITE & IEEE, Oct. 1989.[INTL]
  514. Jong Duk Lee, "The Present and the Future of VLSI Microfabrication Technology in Korea," Japanese Applied Physics Soc. Proc. of 2nd Microprocess Conf., pp.80-83, Kobe Japan, July 1989.[INTL]
  515. Jung Hyun Nam, Sang Sik Park and Jong Duk Lee, "The Characteristics of a n+pn Photodiode Using Punchthrough," KITE Proc. of Conf. on Semiconductor, Components and CAD, Vol.7, No.1, pp7-10, May 1989.
  516. Sang Sik Park, In Sang Jun, and Jong Duk Lee, "Analysis of Discharge and Spectral Response of n+pn Image Sensor," Tech. Report of Japanese TV Society, Vol.13, No.11, pp.13-18, Feb. 1989.
  517. Sang Sik Park, Oh Yeon Park, and Jong Duk Lee, "Analysis of Output Circuits of the MOS Image Sensor," Proc. of KITE Fall Conf. 88, Vol.11, No.1, pp.294-297, Nov. 1988.
  518. Duck Hyun Chang, Sang Sik Park, and Jong Duk Lee, "The Characterization of the n+pn Structure Image Cell Used for a MOS-Type Image Sensor," IREE 7th Australlian Microelectronics Conf. Sydney Univ., pp.16-18, May 1988.
  519. Jung Hyun Nam, Chel Sik Cho, I S. Jun, and Jong Duk Lee, "Numerical Analysis for Spectral Response of n+pn Structure Photoelement," KITE Proc. of the Conf. on Semiconductors, Materials, Components and CAD, Vol.6, No.1, pp.228-231, May 1988.
  520. Sang Sik Park, Dae Kyu Kim, Young Bae Roh, and Jong Duk Lee, "A MOS Image Sensor with 384x485 Pixels for NTSC System," KITE Proc. of the Conf. on Semiconductors, Materials, Components and CAD, Vol.6, No.1, pp.40-43, May 1988.
  521. Sang Sik Park, Jeong Ok Park, Jong Duk Lee, "A 32x33 Photo-elements MOS Image Sensor," KIEE & KITE Joint Meeting, Vol.1, pp.411-415, July 1987.
  522. Yong Bum Kim, Sang Sik Park, Chel Sik Cho, and Jong Duk Lee, "Dynamic NMOS Shift Register Used for Image Sensor," KITE and KITE Joint Meeting on Electronic Materials, Semiconductor and CAD, pp.312-315, May 1987.
  523. Hyung Cheol Shin, Jeong Ok Park, Sang Sik Park, Jong Duk Lee, and Hong Shick Min, "MOS Image Sensor Cell Suppressed Blooming," KIEE and KIEE Joint Meeting on Electronics Materials, Semiconductor and CAD, pp.308-311, May 1987.
  524. Gyo Young Jin, Duck Hyun Chang, Chang Bae Park, and Jong Duk Lee, "Study on Spectral Response of n+p Photodiode," KIEE and KIEE Joint Meeting on Electronics Materials, Semiconductor and CAD, pp.236-239, May 1987.
  525. Ki Woong Whang, Jong Duk Lee, Sung Chul Kim, Young Woon Seo, Kyung Chul Choi, and Hae Wook Han, "Study on Dry Etch Using CF4 Plasma," KIEE Fall Conference, Dec. 1986.
  526. "Fabrication of Dichroic Filter and Their Spectral Characteristics," 1985-KIEE Fall Conference, Vol.8, Nov. 1985.
  527. "V-T Element Implementation and Its Application," 1985-KIEE Fall Conference, Vol.8, Nov. 1985.
  528. "A Study on 1.5 Voltage Operational Amplifier," 1985-KIEE Fall Conference, Vol.8, Nov. 1985.
  529. "Photo Resist Stripping by Oxygen Plasma," 1985-KIEE, CVD, Semiconductor Materials and Devices Meeting, May 1985.
  530. "Charge Hopping in the Spinel Fe1+XV2-XO4," Bull. Am. Phys. Soc., 21, 272, 1975.

   Books

 

  1. Silicon IC Process Technology, 3nd Ed., Banghan Publishing Co., Oct. 2002.
  2. Display Engineering II, Chungbum Publishing Co., Seoul, September 2000.
  3. Display Engineering I, Chungbum Publishing Co., Seoul, March 2000.
  4. Jong Duk Lee, Field Emission Theory and Application, Chungbum Publishing Co., Seoul, May 1998.
  5. Jong Duk Lee, Silicon Integrated Circuit Process Technology, 2nd Ed., Daeyoung Publishing Co., Seoul, August 1991.
  6. Introduction to MOS LSI Design, 2nd Ed., Banghan Publishing Co., April 1987.
  7. Silicon IC Process Technology, 2nd Ed., Banghan Publishing Co., Oct. 1986.
  8. Introduction to MOS LSI Design, Translation of 1983 Copy by J. Mayor, M. A. Jack and P. B. Denyer, Banghan Publishing Co., Dec. 1985.
  9. Silicon IC Process Technology (Vol.2), Banghan Publishing Co., Dec. 1985.
  10. Silicon IC Process Technology (Vol.1), Banghan Publishing Co., Dec. 1985.
  11. Gem and Gemology, Gyekdong Gem Research Institute, Oct. 1977.
  12. Gemology Dictionary, Hanshin Moonhwa Co., 1976.

   Issued Patents

 

  1. Jong Duk Lee, Byung-Gook Park, Sung Hun Jin, "Fabrication method for Double Organic Thin Film Transistors,"
    • Korean Patent filed 10-2004-101338, December 3, 2004
    • Korean Patent No. 0736360, June 29, 2007

 

  1. Jong Duk Lee, Byung-Gook Park, Sung Hun Jin, Cheon An Lee, "Full-swing organic semiconductor circuit,"
    • Korean Patent filed 10-2004-109058, December 20, 2004
    • Korean Patent No. 0724312, May 28, 2007

 

  1. 송기환, 이종덕, 박병국, 정훈, "이중 게이트형 수직 채널 트랜지스터들을 구비하는 다이내믹 랜덤 액세스 메모리 장치 및 그 제조 방법,"
    • Korean Patent filed 10-2005-0081896, September, 2005
    • Korean Patent No. 0673012, January 6, 2007

 

  1. 심재성, 박병국, 이종덕, 김정우, "Structure, Fabricating and Operating Method of SONOS Memory Cell with Multi-Doping Layers,"
    • Korean Patent filed 10-2005-0009844, February 3, 2005
    •   Korean Patent No. 066374, December 26, 2006

 

  1. 심재성, 박병국, 이종덕, 김정우, "NAND Flash Memory Array and Operating Method of the Same Using SONOS Memory Cell with Multi-Doping Layers,"
    • Korean Patent filed 10-2005-0009845, February 3, 2005
    •   Korean Patent No. 063976, December 26, 2006

 

  1. 심재성, 박병국, 이종덕, 김정우, "NOR Flash Memory Array and Operating Method of the Same Using SONOS Memory Cell with Multi-Doping Layers,"
    • Korean Patent filed 10-2005-0009846, February 3, 2005
    •   Korean Patent No. 063977, December 26, 2006

 

  1. 송기환, 이종덕, 박병국, "정전기 방전용 실리콘 제어 정류기,"
    • Korean Patent filed 10-2005-0089345, September, 2005
    • Korean Patent No. 0642651, October 30, 2006

 

  1. Byung-Gook Park, Jong Duk Lee, Byung Yong Choi, "Fabrication Method of MOSFET,"
    • Korean Patent filed 10-2004-0055051, July 15, 2004
    • Korean Patent No. 0559115, March 3, 2006

 

  1. Yong-kyu Lee, Jeong-uk Han, Sung-taeg Kang, Jong Duk Lee, Byung-Gook Park, "Method of manufacturing twin-ONO-type SONOS memory using reverse self-alignment process, "
    • United States Patent filed 10/781,761, February 20, 2004
    • United States Patent No. 7,005,349, February 28, 2006

 

  1. Byung-Gook Park, Jong Duk Lee, Woo Young Choi, "I-MOS and method for fabricating the same,"
    • Korean Patent filed 10-2004-0021812, March 30, 2004
    • Korean Patent No. 0538147, Dec. 15, 2005.

 

  1. Byung-Gook Park, Jong Duk Lee, Cheon An Lee, "A Column driving method for a microdisplay and a column driving circuit using the same,"
    • Korean Patent filed 2003-35440, June 2, 2003
    • Korean Patent No. 0533820, Nov. 30, 2005.

 

  1. Byung-Gook Park, Jong Duk Lee, Dong Soo Woo, "Single electron transistor with controllable quantum dot size, an integration of single electron transistor and double-gate MOSFET, and fabrication method thereof, respectively,"
    • Korean Patent filed 2003-25110, April 21, 2003
    • Korean Patent No. 0517126, Sep. 16, 2005.

 

  1. Byung-Gook Park, Jong Duk Lee, Yong Kyu Lee, Seong Taek Kang, and Jeong Uk Han, "The fabrication method of SONOS nonvolatile memory with twin-ONO formed by reverse self-aligned method,"
    • Korean Patent filed 2003-0020444, April 1, 2003
    • Korean Patent No. 480645, Mar. 24, 2005.

 

  1. Jong Duk Lee, Byung-Gook Park, Sung Hun Jin, Jin Ho Lee, "Organic thin film transistors and method for manufacturing the same,"
    • Korean Patent filed 2003-4002, January 21, 2003
    • Korean Patent No. 0538542, Dec. 16, 2005.

 

  1. Chung Woo Kim, Byung-Gook Park, Jong Duk Lee, Yong Kyu Lee, "Silicon/Oxide/Nitride/Oxide/Silicon nonvolatile memory with vertical channel and Fabricating method thereof and Program method,"
    • Korean Patent filed 2002-71042, November 15, 2002
    • Korean Patent No. 474850, Feb. 24, 2005.

 

  1. Byung-Gook Park, Jong Duk Lee, Kyung Rok Kim, "Method for manufacturing semiconductor device with negative differential conductance or negative transconductance,"
    • Korean Patent filed 2002-39146, July 15, 2002
    • Korean Patent No. 444270, Aug. 3, 2004.
    • United States Patent Filed 10/614666, July 7, 2003.
    • United States Patent No. 6800511, Oct. 5, 2004 (15 claims)

 

  1. Byung-Gook Park, Jong Duk Lee, Woo Young Choi, "Method for manufacturing field effect transistor with lightly doped drain,"
    • Korean Patent filed 2002-27239, May 17, 2002
    • Korean Patent No. 443754, July 29, 2004.

 

  1. Byung-Gook Park, Jong Duk Lee, Byung Yong Choi, "MOSFET and Manufacturing method thereof,"
    • Korean Patent filed 2002-26415, May 14, 2002
    • Korean Patent No. 483564, Apr. 7, 2005.

 

  1. Byung-Gook Park , Jong Duk Lee , Kyung Hoon Chung , Suk Kang Sung, "Method for fabricating ultra-fine multiple patterns,"
    • Korean Patent filed 2001-59254, October 15, 2001
    • Korean Patent No. 0406725, Nov. 10, 2003.

 

  1. Byung-Gook Park , Jong Duk Lee, Dong Soo Woo, "이중 게이트 MOSFET 및 그 제조방법,"
    • Korean Patent filed 2001-35456, June 21, 2001
    • Korean Patent No. 0467527, Jan. 13, 2005.

 

  1. Byung-Gook Park, Jong Duk Lee, Kyung Hoon Chung, Suk Kang Sung, "Method for fabricating ultra-fine multiple patterns,"
    • Korean Patent filed 2001-33065, June 15, 2001
    • Korean Patent No. 0396137, Aug. 18, 2003.

 

  1. Byung-Gook Park , Jong Duk Lee, Young Jin Choi, "전계효과트랜지스터와 그 제조방법,"
    • Korean Patent filed 2001-9078, March 2, 2001
    • Korean Patent No. 0401416, Sept. 30, 2003.

 

  1. Jong Duk Lee, Chun Gyoo Lee, and Hyung Soo Uh, "Methods for Manufacturing Field Emitter Arrays based on Silicon-On-Insulator(SOI) Substrate"
    • Korean Patent Filed 97-45945, Sep. 12, 1997.
    • Korean Patent No. 0300193, June 14, 2001.
    • United States Patent Filed 09/146,597, Sep. 3, 1998.
    • United States Patent No. 6326221, Dec. 4, 2001.

 

  1. Jong Duk Lee and Dong Hwan Kim, "MOSFET-Controlled FEA and Method for Fabricating the Same"
    • Korean Patent Filed 97-30569, July 2, 1997.
    • Korean Patent No. 262144, May 18, 2000.
    • United States Patent Filed 08/937,527, Sep. 27, 1997.
    • United States Patent No. 6074887, June. 13, 2000.

 

  1. Jong Duk Lee, Jae Soo Yoo, and Sung Hee Cho, "Method for Preparing Spherical Phosphor Particles"
    • Korean Patent Filed 97-14442, Apr. 18, 1997.
    • Korean Patent No. 237309, Oct., 1999.
    • United States Patent Filed 09/006,019, Jan. 12, 1998.
    • United States Patent No. 5,885,492, Mar. 23, 1999.

 

  1. Jong Duk Lee, Jae Soo Yoo, and Sung Hee Cho, "A ZnGa2O4(:Mn) Phosphor for Low-Voltage and a Method for Manufacturing a Phosphor Screen by Using It"
    • Korean Patent Filed 96-33447, Aug. 12, 1996.
    • Korean Patent No. 223518, July, 1999.

 

  1. Jong Duk Lee, Kuk Jin Chun, Byung Gook Park, and Jeongho Lyu, "Method for Manufacturing ISRC MOSFET"
    • Korean Patent Filed 95-48511, Dec. 6, 1995.
    • Korean Patent No. 175119, Nov. 7, 1998.
    • United States Patent Filed 08/706,490, Mar. 11, 1997.
    • United States Patent No. 5,747,356, May 5, 1998.
    • Japanese Patent Filed 325250/1996, Dec. 5, 1996.
    • Japanese Patent No. 3657069, Mar. 18, 2005.

 

  1. Jong Duk Lee, "Magnetic Sensor Using Vertical Feild Emission Device"
    • Korean Patent Filed 95-34738, Oct. 10, 1995.
    • Korean Patent No. 0227473, Aug. 3, 1999.

 

  1. Jong Duk Lee, Cheon Kyu Lee and Dong Hwan Kim, "Field Emitter Array Incorporated with Metal Oxide Semiconductor Field Effect Transistors and Method for Fabricating the Same"
    • Korean Patent Filed 95-31636, Sep. 25, 1995.
    • Korean Patent No. 201553, Mar. 15, 1999.
    • United States Patent Filed 08/718,876, Sep. 24, 1996.
    • United States Patent No. 5,731,597, Mar. 24, 1998.

 

  1. Jong Duk Lee and Hyung Soo Uh, "Method for Fabricating a Field Emitter Array Incorporated with Metal Oxide Semiconductor Field Effect Transistors"
    • Korean Patent Filed 95-31635, Sep. 25, 1995.
    • Korean Patent No. 201552, Mar. 15, 1999.
    • United States Patent Filed 08/718,789, Sep. 24, 1996.
    • United States Patent No. 5,872,019, Feb. 16, 1999.

 

  1. Jong Duk Lee and Hyung Soo Uh, "Method for Manufacturing Field Emitter Arrays"
    • Korean Patent Filed 95-15449, June 12, 1995.
    • Korean Patent No. 201554, Mar. 15, 1999.
    • United States Patent Filed 08/661,458, June 11, 1996.
    • United States Patent No. 5,688,707, Nov. 18, 1997.
    • Japanese Patent Filed 151316/1996, June 12, 1996.
    • Japanese Patent No. 2793171, Jun. 19, 1998.

 

  1. Jong Duk Lee, Ho Young An and Cheon Kyu Lee, "A Method for Manufacturing a Low Voltage Driven Field Emitter Array"
    • Korean Patent Filed 94-33634, Dec. 21, 1994.
    • Korean Patent No. 0159805, Aug. 13, 1998.